Board Assembly
2
ADC161S626BEB User’s Guide
SNAU120-April 2012
Test Point
Purpose
SCLK,
DOUT, CSB
ADC SPI bus signals. Located below the DUT.
VREF,
VDDIO, VA
If external supplies on the banana jacks are used for VREF, VA,
VIO EXT the center pins of jumpers VREF SELECT, VIO
SELECT, VA SELECT can be used as a test point for those
signals. If on board power supplies (from the SPIO board) are
used, the banana jacks can be used as test points.
Table 1: Test Points on the ADC161S626 Evaluation Board
Connector
Purpose
SPIO-
GPSI16
16 pin dual row right angle male header to connect to the SPIO4
board.
GPSI16
16 pin dual row right angle female header. Carries signals from
the SPIO4 board to any optional SensorAFE board.
AB12
12 pin dual row right angle male header. Carries analog bus
signals from an external source or the optional Sensor AFE board
to the ADC.
Table 2: Connectors on the ADC161S626 Evaluation Board
Jumper
Purpose
VREF
SELECT
Selects reference source for VREF. Settings are Vref banana
jack, on board Va or on board LM4120-4.1
VIO SELECT
Allows choice of VIO for the chip, the SPIO interface and
whatever sensor board is connected to the ADC board. Choices
are on board Va, 3.3V from the SPIO connector or the VIO EXT
banana jack.
VA SELECT
Allows choice of VA for the part. Choices are VA banana jack or
5V from the SPIO connector.
Table 3: Jumpers
