Tews Technologies TAMC900, User Manual, Page: 31 / 71

TAMC900 User Manual Issue 2.0.1 Page 31 of 71
6.4 Global Reset and Software Trigger Input
Simulating external trigger signals can be performed by the subsequent register. Trigger events initiated by
using this register are only processed if software trigger input is selected (per channel group).
Moreover the register can be used to reset the internal structure that is channel specific.
Bit Symbol Description Access
2
Reset
Value
15 CRST7 R/W 0
14 CRST6 R/W 0
13 CRST5 R/W 0
12 CRST4 R/W 0
11 CRST3 R/W 0
10 CRST2 R/W 0
9 CRST1 R/W 0
8 CRST0
Resetting a channel (x) is performed by writing 0x1 at the
channel corresponding bit position (CRSTx).
R/W 0
7:1 - Reserved R 0
0 SWT Writing a value 0x1 at this bit position causes a single-cycle
trigger input. R/W 0
Table 6-4 : Global Reset and Software Trigger Input Register (Address 0x10)
The software generated trigger inputs are equivalent to external trigger signals.
2
Read Value is always zero