R-Engine-D
Chapter 3: Hardware
3-11
EEPROM
A serial EEPROM of 512 bytes (24C04) is be installed in U7. The R-Engine-D uses the P22=SCL (serial
clock) and P29=SDA (serial data) to interface with the EEPROM. The EEPROM can be used to store
important data such as a node address, calibration coefficients, and configuration codes. It typically has
1,000,000 erase/write cycles. The data retention is more than 40 years. EEPROM can be read and written
by simply calling the functions
ee_rd()
and
ee_wr()
.
A range of lower addresses in the EEPROM is reserved for TERN use, 0x00 – 0x1F. The addresses 0x20
to 0x1FF are for user application.
ADS8344, 16-bit ADC
The ADS8344 is an 8-channel, 16-bit, sampling ADC with synchronous serial interface. In single channel
operation a 25KHz sampling rate can be achieved. The ADC can accept input voltages in the range of
0-5 volts. All eight input channels are routed to the J4 pin header to easy access to the device. The R-
Engine-D employs a variety of on-board signals to interface the ADC. It uses 2 output lines from the
SCC26C92 to drive the DataIn (DIN) line and the chip select line (/CS). It also uses one of the inputs of
the SCC26C92 as the Busy (BSY) signal. In addition, the synchronous serial port on the Am186ER is used
to clock (SCLK) the ADC and read the ADC conversion results using the SDAT line. TERN provides
three software drivers for this ADC. This de-coupling of instructions to drive the ADC achieves a greater
sampling rate when in single channel mode, as you do not have to wait for the on-chip multiplexer to settle,
or delay associated with other control logic on the ADC. The following table summarizes the signals to and
from the ADC. Please refer to the sample code in the
186\samples\rd
directory (rd_ad16.c)
SCLK
Serial clock from Am186ER
OP3
Active low chip select. Output from SC26C92. If low, the ADC will have output on SDAT.
OP4
DIN. Serial data in. Output from SC26C92
IP6
BSY. Low while control bytes are being read, and during conversion.
SDAT
Serial data out. Input to SC26C92.
SHD
Active low power down. Tied to VCC, never in power down.
COM
Tied to Ground
REF
Tied to VCC. Sets valid analog input to 0-5V
Dual 12-bit DAC (DAC7612U)
The DAC7612 is a dual, 12-bit digital-to-analog converter with guaranteed 12-bit monotonicity
performance over the industrial temperature range. It requires a 5V supply and contains an input
shift register, latch, 2.435V reference, a dual DAC, and high speed rail-to-rail amplifiers. For a full-scale
step, each output will settle to 1LSB within 7µs.
The DAC7612 uses a three wire serial interface to the CPU. The CPU on the R-Engine-D uses two output
lines from the SCC26C92 and two lines from the Am186ER to drive the serial interface (Data In, Clock,
Chip select and Latch Data) in an 8-lead SOIC package. The R-Engine-D offers up to two DAC7612,
providing a possible 4 12-bit serial DAC channels. The DAC7612 outputs can support a capacitive load of
500pF.
The DACs are located in the U15 and U17 positions with the analog outputs routed to the J3 pin header,
pins 47-50. See the schematic at the end of this technical manual.
