P52
Hardware
3-3
3.3.2
Programmable Peripheral Interface (82C55A)
The U1 PPI (8255) is a low-power CMOS programmable parallel interface unit for use in microcomputer
systems. It provides 24 I/O pins that may be individually programmed in two groups of 12 and used in
three major modes of operation.
In MODE 0, the two groups of 12 pins can be programmed in sets of 4 and 8 pins to be inputs or outputs.
In MODE 1, each of the two groups of 12 pins can be programmed to have 8 lines of input or output. Of
the 4 remaining pins, 3 are used for handshaking and interrupt control signals. Finally, MODE 2 is a
strobed bi-directional bus configuration.
7
6
0
1
2
3
4
5
G R O U P 1
P o r t 2
( L o w e r )
P o r t 1
M o d e
0
1
0
1
0
1
O u t p u t
I n p u t
O u t p u t
I n p u t
M o d e 0
M o d e 1
G R O U P 2
P o r t 2
( U p p e r )
P o r t 0
M o d e
0
1
0
1
0 0
0 1
O u t p u t
I n p u t
O u t p u t
I n p u t
M o d e 0
M o d e 1
M o d e 2
1 X
C o m m a n d
S e l e c t
0
1
B i t
m a n i p u l a t i o n
M o d e
S e l e c t
Figure 3.1 Mode Select Command Word
P52
maps U1, the PPI 8255, at base I/O address PPI = 0x1080 (586-Engine) and 0x00 (186-Engine).
All ports/registers are offsets of this I/O base address.
The Command Register address = PPI+6; Port 0 address = PPI+0; Port 1 address = PPI+2;
and Port 2 address = PPI+4.
The following code example will set all ports to output mode:
outportb(PPI+6,0x80); /* Mode 0 all output selection. */
And then write to specific pins after setup:
outportb(PPI+0,0x55); /* Sets port 0 to alternating high/low I/O pins. */
outportb(PPI+2,0x55); /* Sets port 1 to alternating high/low I/O pins. */
outportb(PPI+4,0x55); /* Sets port 2 to alternating high/low I/O pins. */
To set all ports to input mode:
outportb(PPI1+6,0x9f);
/* Mode 0 all input selection. */
