71M6521 Demo Board User’s Manual
Revision 2.18
© 2005-2009 TERIDIAN Semiconductor Corporation
Page: 7 of 111
Figure 4-17: D6521T4A10 Demo Board: Top Copper
Figure 4-18: D6521T4A10 Demo Board: Bottom Copper
............................................................................................ 99
Figure 4-19: D6521T4A10 Demo Board: Bottom View
.............................................................................................. 100
Figure 4-20: Debug Board: Electrical Schematic
Figure 4-21: Debug Board: Top View
Figure 4-22: Debug Board: Bottom View
Figure 4-23: Debug Board: Top Signal Layer
Figure 4-24: Debug Board: Middle Layer 1, Ground Plane
................................................................................... 104
Figure 4-25: Debug Board: Middle Layer 2, Supply Plane
.................................................................................... 105
Figure 4-26: Debug Board: Bottom Trace Layer
Figure 4-27: TERIDIAN 71M6521 QFN68: Pinout (top view)
..................................................................................... 108
Figure 4-28: TERIDIAN 71M6521 LQFP64: Pinout (top view)
................................................................................... 109
List of Tables
Table 1-1: Jumper settings on Debug Board
Table 1-2: Straight Cable Connections
Table 1-3: Null-Modem Cable Connections
Table 1-4: COM Port Setup Parameters
Table 1-5: Summary of Communication Options
Table 1-6: Selectable Display Options
Table 1-7: Fields of a Hex Record
Table 1-8: Data (Command) Types
Table 1-9: Hex Record Examples
Table 1-10: Pre-Assembled Hex Records
Table 1-11: CE RAM Locations for Calibration Constants
........................................................................................... 33
Table 1-12: Flash Programming Interface Signals
Table 1-13: MPU memory locations (71M6521DE/FE)
................................................................................................ 41
Table 1-14: Values for Pulse Source Registers
Table 1-16: CE Memory Locations (71M6521FE, 71M6521DE)
.................................................................................. 45
Table 1-17: CE memory locations (71M6521BE)
Table 1-19: Some MPU Memory Locations
Table 2-1: Calibration Summary
Table 3-1: D6521N12A7 Demo Board Description
Table 4-4: D652T4A7 Demo Board: Bill of Material
Table 4-2: D652T4A8 Demo Board: Bill of Material
Table 4-3: D652T4A10 Demo Board: Bill of Material
Table 4-4: Debug Board: Bill of material
Table 4-5: 71M6521 Pin Description 1/2
Table 4-6: 71M6521 Pin Description 2/2