71M6521 Demo Board User’s Manual
Revision 2.18
© 2005-2009 TERIDIAN Semiconductor Corporation
Page: 61 of 111
2.3 SCHEMATIC INFORMATION
In this section, hints on proper schematic design are provided that will help designing circuits that are
functional and sufficiently immune to EMI (electromagnetic interference).
2.3.1 COMPONENTS FOR THE V1 PIN
A voltage divider should be used to establish that V1 is in a safe range when the meter is in mission mode
(V1 must be lower than 2.9V in all cases in order to keep the hardware watchdog timer enabled). The header
shown above R1 in Figure 2-8 can be used to disable the hardware watchdog timer by plugging in a
shorting jumper.
Figure 2-8: Voltage Divider for V1
On the 6521 Demo Boards this feature is implemented with resistors R83/R86 and TP10. See the board
schematics in the Appendix for details.
2.3.2 OSCILLATOR
The oscillator of the 71M6521 drives a standard 32.768kHz watch crystal (see Figure 2-9). Crystals of this
type are accurate and do not require a high current oscillator circuit. The oscillator in the 71M6521 has been
designed specifically to handle watch crystals and is compatible with their high impedance and limited power
handling capability. The oscillator power dissipation is very low to maximize the lifetime of any battery
backup device attached to the VBAT pin.
Figure 2-9: Oscillator Circuit
V3P3
R
2
V1
R
1
R
3
5k
Ω
C
1
100pF
GND
V3P3
R
2
V1
R
1
R
3
5k
Ω
C
1
100pF
GND
crystal
XOUT
XIN
71M6521
