DE910 Series Hardware User Guide
1vv0300951 Rev.9 – 2015-05-11
Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights
Reserved. Page 20 of 77
3.1.2.
LGA Pads Layout (DE910-SC)
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
1
ADC_IN1
RES
RES
GND
ANT_DIV
GND
GND
GND
ANTENNA
GND
VBATT
VBATT_PA
VBATT_PA
1
2
GND
RES
RES
RES
GND
GND
GND
GND
GND
GND
GND
VBATT
VBATT_PA
VBATT_PA
GND
2
3
RUIM VCC
RES
TP1
TP6
TP7
RES
RES
RES
RES
RES
RES
GND
GND
GND
GND
3
4
RES
RES
TP2
GND
GND
GND
GND
GND
4
5
RUIMIO
RES
TP3
GND
GND
GND
5
6
RUIM CLK
DVI_RX
TP4
GND
GND
GND
6
7
RUIM RST
DVI_TX
TP5
RES
RES
GPS_LNA_E
N
7
8
RES
DVI_CLK
GPIO_01
RES
GND
GND
8
9
RES
DVI_W A0
GPIO_02
RES
GND
ANT_GPS
9
10
RES
RES
GPIO_03
RES
GND
GND
10
11
RES
RES
GPIO_04
RES
RES
VAUX/PW R
MON
11
12
RES
RES
GPIO_06
RES
GND
RES
RES
ON_OFF*
12
13
USB_VBUS
GND
GPIO_07
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
GND
HW _SHUTD
OW N*
13
14
RES
GPIO_05
VRTC
RES
GND
RES
RES
RES
RES
RES
C105/RTS
C108/DTR
C109/DCD
C107/DSR
C125/RING
14
15
USB_D+
USB_D-
TX_AUX
RX_AUX
RES
GPIO_10
RES
RES
GPIO_08
GPIO_09
C104/RXD
C103/TXD
C106/CTS
15
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
Top View
NOTE:
The pin defined as
RES
must be considered RESERVED and not connected on any pin in the
application. The related area on the application has to be kept empty.