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Acquiring and Viewing Disassembled Data
2–12
TMS 540 PowerPC 60X Microprocessor Support Instruction Manual
2
Address Group. Lists data from channels connected to the PowerPC 60X
address bus.
3
Hi_Data Group. Lists data from channels connected to the PowerPC 60X
DH31-DH0 signals.
4
Lo_Data Group. Lists data from channels connected to the PowerPC 60X
DL31-DL0 signals.
5
Mnemonics Column. Lists the disassembled instructions and cycle types.
The Software display format shows only the first fetch of executed instructions.
Flushed cycles and extensions are not shown, even though they are part of the
executed instruction. Data reads and writes are not displayed.
The Control Flow display format shows only the first fetch of instructions that
change the flow of control.
Instructions that generate a change in the flow of control in the PowerPC 60X
microprocessor are as follows:
b
bl
sc
ba
bla
rfi
Instructions that might generate a change in the flow of control in the PowerPC
60X microprocessor are as follows:
bc
bcla
bcctr
tdi
bca
bclr
bcctrl
tw
bcl
bclrl
td
twi
The disassembler displays some instructions that cause traps or interrupts, as well
as exception vector reads that are taken and
( **BAD CYCLE TYPE** )
.
Mnemonics misinterpreted by the disassembler are also displayed.
The Subroutine display format shows only the first fetch of subroutine call and
return instructions. It will display conditional subroutine calls if they are
considered to be taken.
Instructions that generate a subroutine call or a return in the PowerPC 60X
microprocessor are as follows:
sc
rfi
Instructions that might generate a subroutine call or a return in the PowerPC 60X
microprocessor are as follows:
td
tdi
tw
twi
Software Display Format
Control Flow Display
Format
Subroutine Display
Format