Tektronix TLA500 Series, Technical Reference

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Performance Veri fi cation Procedures
Setup and Hold
This procedure veri fi es the setup and hold speci fi cations of the logic analyzer.
Equipment required Digital timing generator
Precision BNC cable
Setup and Hold test
fi xture
Prerequisites Warm-up time: 30 minutes
Digital Timing Generator
Setup
1. Verify that the digital timing generator (DTG) has been calibrated so that the
channel-to-channel skew is minimized.
2. Set up the DTG so that a channel (CH1 for example), is set to be a clock
pattern of alternating 1 and 0 (101010… binary) starting with 1 (rising edge).
3. Set the output frequency to 235MHz. (This may require you to set the DTG
base clock to 470 MHz for this pattern to represent 235 MHz at the channel
output.)
4. Set another channel of the DTG (CH2 for example) to a data pattern
representing half the period of CH1 (for example 001100110011...binary,
starting with 00).
5. Connect the setup and hold test fi xtures to the DTG channels that you have set
up. Connect 50 Ω SMA terminations to the test fi xtures.
6. Connect the DTG channel that you set up as a clock to the appropriate TLA
CK[x] input.
7. Connect the other DTG channel to two of the TLA data channels that you
want to test.
If you want to test other TLA data channels simultaneously and your DTG
has additional outputs available, set up those DTG channels like the
fi rst data
channel, and connect them to the other logic analyzer channels that you want
to test. (You will need another test
fi xture for each additional channel pair.)
Otherwise, repeat the procedure for each new pair of logic analyzer channels.
8. Set the termination to open on each DTG channel.
9. Set the DTG output voltage levels to 2.50V High and 0.0V Low, with no
offset.
30 TLA5000 Series Product Speci fi cations & Performance Veri fi cation