TMS 420 R3051, R3052 & R3081 Microprocessor Support Instruction Manual
Index–1
Index
A
about this manual set, ix
acquiring data, 2–5
Address group
channel assignments, 3–6
display column, 2–7
alternate connections
extra channel probes, 3–14
to other signals, 3–13
B
basic operations, where to find information, ix
bus cycles, displayed cycle types, 2–6
bus timing, 3–12
C
certifications, 3–3
channel assignments
Address group, 3–6
clocks, 3–11
Conds group, 3–11
Control group, 3–8
Data group, 3–7
DataSize group, 3–9
Debug group, 3–10
Intr group, 3–10
MiscCtrl group, 3–10
Timing group, 3–9
channel groups, 2–1
clock channel assignments, 3–11
clock rate, 1–2
clocking, Custom, 2–1
how data is acquired, 3–12
clocking options
DMA Cycles, 2–2
field names, 2–1
how data is acquired, 3–13
Probe Interface Type, 2–2
compliances, 3–3
Conds group, channel assignments, 3–11
connections
no probe adapter, 1–9
channel probes, 1–10
clock probes, 1–12
other microprocessor signals, 3–13
probe adapter to SUT
PGA, 1–3
PLCC, 1–6
Control Flow display format, 2–8
Control group
channel assignments, 3–8
display column, 2–7
symbol table, 2–2
CPU Regs field, 2–9
Custom clocking, 2–1
DMA Cycles, 2–2
how data is acquired, 3–12
Probe Interface Type, 2–2
cycle types, 2–6
D
data
acquiring, 2–5
disassembly formats
Control Flow, 2–8
Hardware, 2–6
Software, 2–8
Subroutine, 2–8
how it is acquired, 3–11
Data Bytes field, 2–9
data display, changing, 2–8
Data group
channel assignments, 3–7
display column, 2–7
DataSize group
channel assignments, 3–9
symbol table, 2–3
Debug group, channel assignments, 3–10
demonstration file, 2–9
dimensions, probe adapter, 3–4, 3–5
disassembled data
cycle type definitions, 2–6
viewing, 2–5
viewing an example, 2–9
disassembler
definition, ix
logic analyzer configuration, 1–2
setup, 2–1
Disassembly Format Definition overlay, 2–8
Disassembly property page, 2–8
display formats
Control Flow, 2–8