Sec1ion 2-7M13
THEORY OF OPERATION
INTRODUCTION
The
7M13
Raadout Unit
provides front panet operation
of
the
readout
system
of
any
Tektronix
7000
series
oscilloscope.
It
will
operatlt
in
....
y
pl
u
g-i
n
position in
the
oscilloscope
mainframe. The readout
display
will appear on
th
e
CRT
in
the
position
associated with
th
e
selected
plug-in
compartment.
Refer
to
the
mainframe
service
m
an
u
al for
the
readout
system
circuit description
and
to diagram
1
in
thi
s
manual for
the
fo
ll
owi
n
g
ci
rc
u
it
d
escr
i
p
ti
o
n
.
THEORY OF OPERATION
The
WRITE
pushbuttons
select
e
i
th
er
the
UPPER
or
LOWER (channels 1
....
d
2
respectively)
memory
IC
'
s
for
data
storage.
Th
i
s
routlts
the
outpu
t of U202B throultl Ul68C
for
the
UPPER
and
throultl U168D
for
the
LOWER
channel selection.
The
signal
i
s
then presented
to
the app
rop
r
i
a
te
column and
row memory,
write enable
inputs.
Each
ch
a
n
ne
l
has
a
ten
character
capacity. As
each
successive
ch
a
racte
r
pushbutton
is pressed,
the
output
of
U132C
causes
U
l
98
to
advance
its
count
to the
next
ch
a
r
ac
tlt
r
position address. This continues
u
n
til
all character
positions are
filled.
U129B locks
in
the
te
n
th
position and
is reset
by pressing
ERASE.
Pressing
a
character
button when
al
l
ten
positions
are
filled will
ca
u
se
the
ten
th
character
to
be
r
e
p
l
aced
with
the newly
selected
one.
The ERASE pushbutton,
when
pressed,
f
ir
e
s
single-shot U170B. The
p
u
l
se
from
U
1
7
0B
dears
U
1
2
9
B
and
al
l
o
w
s
pulses
derived from
time
stot information (output
of
Ul63D)
to
be
presented
th
r
oultl
Ul68A,
U168B,
and
U132C
to
U198 (address-to-memory).
The
output
of U
168
B
is
also
presented
to
the
write-i
n
t
o
-me
m
o
ry
circuits.
These
pulses
cause
U198
to count
th
r
o
ugh
all
data addresses,
w
h
i
l
e
the
write-into-memory circuits
a
l
lo
w
the
data
prese
n
t
on
th
e
data
i
n
p
u
ts
to
the row
and
column
IC
'
s to
be
written into the memories.
No
data
i
s
present on
the
i
n
p
u
ts
to
the memories
d
u
r
i
ng
ERASE.
This
"no
data"
condition
is
in
terpre
ted
as
a skip
command
and
results
in a
b
l
an
k
display f
o
r that channel. When
s
ingl
e
-sh
o
t
U170B returns to its normal
state,
it triggen
singl
e
-sh
ot
U170A
to
reset
Ul29B
a
n
d the
address-to-memory
countltr, U198.
Time
st
o
t
pulses 2
through
10 are routed through 0177 and
0185.
T
h
e
se
pulses are
used
to
advance
U195,
the
read
from
memory
address
IC.
Time
sl
o
t
1
is
routed
through
0190
and
is
used
to
reset U195
at
the
and
of
each count.
The
address
multiplexer
(U200) determines
which
address,
either
time
slot (output of
U1
9
5
)
or
data
(output
of
U198), will
be
directed
to
the
memory
select in
p
u
t
s
.
Normally, U200
directs
time
stot
addresses
to these
inputs
for
d
a
ta
readout,
however,
when
a character
pushbutton
is
pressed
on
the
front panel
o
f
the
R
ead
o
u
t
Unit,
t
he
output of U202A
ca
u
ses
the multiplexer
t
o
switch
....
d
r
e
ad
the
address
at
the
outputs
of
Ul98.
Pressing
a character
button
su
p
p
l
i
es
ground
closures
to
the
i
n
p
u
ts
of
U109
(column data)
and
Ul03
(row
data).
U
1
09
and
U103
are
decimal-to-BCD co
n
v
erten
.
They
ge
n
er
a
t
e
the
coded
character
information
presented to
th
e
memory data inputs;
c
o
l
u
m
n
data to U
2
8
0 and
U260,
row
d
a
ta
to
U240
and
U220.
Since
al
l
characters generate
column data, the outputs
of
Ul09 (throult!
diodes
CR109, CR110, CR111,
and
CR112)
are
used
to
inititate
the
write-into-memory
command
signals
and to trigger
the
address-to-memory.
This
signal,
through U202A,
is
also used
to
switch
the address
multiplexer
(U200)
from
the
read-from·mem ory
address
(output
of
U105)
so
that
data
stored
in
the
memories
can
be
read
and
2-1
