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Technical

Information

Manual

MOD. V 793

16 January 2001

Revision n. 0

ICARUS

SLOW CONTROL

MODULE

NPO:

00100/98:V793x.MUTx/00

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Summary of Contents for V793

Page 1: ...Technical Information Manual MOD V 793 16 January 2001 Revision n 0 ICARUS SLOW CONTROL MODULE NPO 00100 98 V793x MUTx 00...

Page 2: ...6 1 3 1 Baseline generation 6 1 3 2 EN_BRD signals generation 6 1 3 3 Clock signal generation 6 1 3 4 Detector and crate power supply voltages measurement 6 1 3 5 Test pulses distribution 7 2 TECHNICA...

Page 3: ...CK DIAGRAM OF THE MODEL V793 5 FIG 2 1 MODEL V793 FRONT PANEL 9 FIG 2 2 PIN CONFIGURATION OF MODEL V793 BACKPLANE CONNECTORS 11 FIG 2 3 JUMPERS LOCATION 13 FIG 2 4 RS232 PORT CONFIGURATION 14 FIG 3 1...

Page 4: ...p to 19 Mod V791 boards The Mod V793 main functions are Generate the EN_BRD logic signals to enable disable the Mod V791 boards Set the acquisition baseline for the V791 boards Generate a clock signal...

Page 5: ...5 1 2 Block diagram to V791 to A764 ADC MUX CON_HV 1 4 4 GND 5V D 5V A 5V A DAC 1 DAC 2 DAC2 EN_BRD 1 19 19 OUT REG TEST_PULSE TEST_PULSE T_PULSE T_PULSE CAENET CONTROLLER CAENET Line DRV_1 CLOCK CLO...

Page 6: ...EN_BOARD n signal is active the n th V791 board is forced into reset state and signal digitisation is stopped The EN_BOARD signals can be remotely programmed either via RS232 or CAENET interface 1 3 3...

Page 7: ...ENABLE_ODD lines TTL levels as explained in the table below The lines status is remotely programmable by RS232 or CAENET interface four front panel LED CE CO EE and EO display the lines status At modu...

Page 8: ...1 unit wide 6 unit high Eurocard standard mechanics The front panel of the Model V791 is shown in Fig 2 1 2 2 Power Requirements The power requirements of the board are Table 2 1 Power requirements Po...

Page 9: ...US Slow Control Module 16 01 01 0 NPO Filename Number of pages Page 00100 98 V793x MUTx 00 V793_REV0 DOC 19 9 2 3 Front panel SERIAL IN OUT STATION NUMBER CLK I 0 RS 232 PULSE IN 1 2 3 4 CE CO EE EO D...

Page 10: ...TTL level ENABLE_EVEN ENABLE_ODD test pulse enable signals for even odd A764 channels TTL level CALIB_EVEN CALIB_ODD test pulse enable signals for even odd V791 channels TTL level CLOCK CLOCK differen...

Page 11: ...AGND EN_B4 EN_B8 EN_B12 EN_B16 EN_B18 1C 1A 1B CK CK DGND AGND CAL_O CAL_E AGND TST_P TST_P EN_B1 EN_B3 EN_B5 EN_B7 EN_B9 EN_B11 EN_B13 EN_B15 EN_B17 EN_B19 C_TEST HV1 HV3 5V DGND AGND 5VA 5VA 5VA 5VA...

Page 12: ...cal specifications 9 pin D type connector Electrical specifications RS232 signals see 3 for further details PULSE IN Mechanical specifications LEMO EPG 0B type connector Electrical specifications diff...

Page 13: ...nternal oscillator drives the CK CK backplane lines Jumper between pin 5 and 6 the external clock signal is sent to the CK CK backplane lines These two settings are mutually exclusive Jumper between p...

Page 14: ...ision User s Manual MUT Mod V793 ICARUS Slow Control Module 16 01 01 0 NPO Filename Number of pages Page 00100 98 V793x MUTx 00 V793_REV0 DOC 19 14 5 1 6 9 2 7 3 8 4 D G N D TRANSMIT RECEIVE J P 1 1 3...

Page 15: ...ssignment is given in Fig 2 2 Table 3 1 RS232 Port Settings Baud rate 9600 Parity None Character length 8 bits Number of stop bits 1 bit Flow control Xon Xoff Connect the V793 to the PC RS232 serial p...

Page 16: ...ite the pattern of inhibit 0 3 hexadecimal then press CR the LSB corresponds to the ENABLE_EVEN line status Press 4 to set the detector test lines status write the pattern of inhibit 0 F hexadecimal t...

Page 17: ...aen icarus v793caenet zip For details on the CAENET commands format please refer to APPENDIX A Connect the V793 to the A303A on the PC via a 50 Ohm coaxial cable the CAENET line needs to be terminated...

Page 18: ...itle Revision date Revision User s Manual MUT Mod V793 ICARUS Slow Control Module 16 01 01 0 NPO Filename Number of pages Page 00100 98 V793x MUTx 00 V793_REV0 DOC 19 18 Fig 4 1 V793 CAENET Controller...

Page 19: ...ST CNT_1 DAC1_3 CNT_1 DAC2_3 EN_B3 EN_B11 EN_B19 CNT_0 DAC1_2 CNT_0 DAC2_2 EN_B2 EN_B10 EN_B18 DAC1_1 DAC2_1 LSB EN_B1 EN_B9 EN_B17 DAC1_0 DAC2_0 EN_BRD bits are active low The message sent from the C...

Page 20: ...pe Title Revision date Revision User s Manual MUT Mod V793 ICARUS Slow Control Module 16 01 01 0 NPO Filename Number of pages Page 00100 98 V793x MUTx 00 V793_REV0 DOC 19 20 CNT0 enables test pulsing...

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