Connector Pinouts D-12
PC/104 Card Connector (P1)
A Side
B Side
P1 Pin
I/O PIN
Signal Name
I/O
P1 Pin
I/O PIN
Signal Name
I/O
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
IOCHK*
SD7
SD6
SD5
SD4
SD3
SD2
SD1
SD0
IOCHRDY
AEN
SA19
SA18
SA17
SA16
SA15
SA14
SA13
SA12
SA11
SA10
SA9
SA8
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA0
GND
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
-
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
GND
RESET DRV
VCC (+5V)
IRQ9
-5V
DRQ2
-12V
OWS*
+12V
Not Connected
SMEMW*
SMEMR*
IOW*
IOR*
DACK3*
DRQ3
DACK1*
DRQ1
REFRESH*
SYSCLK
IRQ7
IRQ6
IRQ5
IRQ4
IRQ3
DACK2*
T/C
BALE
VCC (+5V)
OSC
GND
GND
-
O
-
I
-
I
-
I
-
-
O
O
I/O
I/O
O
I
O
I
I/O
O
I
I
I
I
I
O
O
O
-
O
-
-
*
Active low signal
Summary of Contents for VIPer808
Page 21: ...Installing Memory 2 3 DIAGRAM 2 1 Assembly Top...
Page 22: ...Installing Memory 2 5 DIAGRAM 2 2 Assembly Bottom...
Page 26: ...Setting Jumpers 3 3 DIAGRAM 3 1 VIPer808 Jumper Locations with Default Settings...
Page 28: ...Setting Jumpers 3 6 TABLE 3 1a Jumper Settings W1 W4 W13 W14...
Page 29: ...Setting Jumpers 3 7 TABLE 3 1b AMD DX2 DX4 CPU Jumper Settings W1 W15 W15C...
Page 30: ...Setting Jumpers 3 8 TABLE 3 1c AMD 5x86 CPU Jumper Settings W1 W15 W15C...
Page 31: ...Setting Jumpers 3 9 TABLE 3 1d Intel CPU Jumper Settings W1 W15 W15C...
Page 32: ...Setting Jumpers 3 10 TABLE 3 1e SGS CPU Jumper Settings W1 W15 W15C...
Page 33: ...Setting Jumpers 3 11 TABLE 3 1f Jumper Settings W18 W20 W23...
Page 92: ...Memory I O Maps B 1 APPENDIX B MEMORY I O MAPS B 01 MEMORY MAPS DIAGRAM B 1 Memory Map Diagram...
Page 96: ...Mechanical Layout Block Diagram C 3 DIAGRAM C 1 Mechanical Specifications...
