Jumpers
7
6
5 4 3 2 1 0
RSVD
RSVD JP5 JP4 RSVD JP2 JP1 RSVD
Address:
Base + 6 (Read Only)
Definition:
This register allows one to determine the state of the jumpers.
Bit Description:
JP5:
This bit indicates the state of JP5, set indicates the jumper is
on.
JP4
:
This bit indicates the state of JP4; set indicates the jumper is
on.
JP2
:
This bit indicates the state of JP2; set indicates the jumper is
on.
JP1
:
This bit indicates the state of JP1; set indicates the jumper is
on.
RSVD
:
Reserved.
6. Jumpers
JP1 and JP2 determine the base address, base address configurations are shown
below.
Base
Address
0x140 0x148 0x160 0x168
JP1 Off On Off On
JP2 Off Off On On
JP3 and JP4 determine data width, data width configurations are shown below (JP3 and
JP4 must both be on or must both be off).
Data Width
8-Bit 16-Bit Invalid
Invalid
JP3 On Off Off On
JP4 On Off On Off
7. Current Drain
The TS-NVRAM2 uses approximately 50 mA of current from the PC/104 bus 5V supply.
When the PC/104 5V is not present, the RAM chips are powered by the lithium battery
(CR2450). Approximately 2-4 uA of backup current is required to power the RAM chips
in this mode. This can be measured with a DVM by measuring the voltage at the test
point labeled “Drain Test” with respect to ground. Every microamp of drain current from
the battery causes a negative 100 microvolts of voltage.
10
Summary of Contents for TS-NVRAM2
Page 1: ...TS NVRAM2 Manual i...