background image

 

Note: TS-ARM platforms only 

MEM_SELECT Base 

address 

000 0x1180_0000 
001 0x1181_0000 
010 0x1182_0000 

011 

0x1183_0000 

100 0x11B0_0000 
101 0x11B1_0000 
110 0x11B2_0000 
111 0x11B3_0000 

 

If the DECODE bit is clear, base addresses are as 
follows. 
 

 

Note: 8-bit mode only 

MEM_SELECT Base 

address 

000 0xA0000 
001 0xA8000 
010 0xB0000 

011 

0xB8000 

100 0xC0000 
101 0xC8000 
110 0xD0000 
111 0xD8000 

 

When in linear mode MEM_SELECT bit 0 
determines the base address.  
 

Bit 0, 

MEM_SELECT 

Memory 

Width 

Base Address 

0 16 

0x2A80_0000 

1 16 

0x2AA0_0000 

 
 

RSVD

:    

Reserved. 

 

9

Summary of Contents for TS-NVRAM2

Page 1: ...TS NVRAM2 Manual i...

Page 2: ...lls AZ 85268 480 837 5200 FAX 837 5300 info embeddedx86 com http www embeddedx86 com This revision of the manual is dated September 16 2005 All modifications from previous versions are listed in the a...

Page 3: ...ide of the package This limited warranty does not cover damages resulting from lightning or other power surges misuse abuse abnormal conditions of operation or attempts to alter or modify the function...

Page 4: ...nts Limited Warranty 3 1 Introduction 5 2 Getting Started 5 3 PC 104 Bus Interface 5 4 Maxim DS1321 Controller 6 5 Registers 6 6 Jumpers 10 7 Current Drain 10 8 Temperature Range 11 Appendix A Manual...

Page 5: ...ls Now the NVRAM memory can be accessed at the memory addresses 0xD0000 to 0xD7FFF Any one of the 64 pages can be selected by writing to the page register at I O location 0x144 Since each page is 32 K...

Page 6: ...onitoring requires loaded battery voltage measurement The DS1321 performs such measurement by periodically comparing the voltage of the battery to an internal precision reference with the battery load...

Page 7: ...0x01 Initial Revision LED Status 7 6 5 4 3 2 1 0 RSVD RSVD RSVD RSVD RSVD RSVD GREEN RED Address Base 3 Read Only Definition This register allows one to determine the state of the LEDs Bit Description...

Page 8: ...wer up or a system reset Note When the LINEAR bit is set PAGED and MEM_SELECT bits 1 through 3 are ignored Bit Description LINEAR When this bit is set NVRAM appears as linear memory This mode is not c...

Page 9: ...0x11B3_0000 If the DECODE bit is clear base addresses are as follows Note 8 bit mode only MEM_SELECT Base address 000 0xA0000 001 0xA8000 010 0xB0000 011 0xB8000 100 0xC0000 101 0xC8000 110 0xD0000 11...

Page 10: ...low Base Address 0x140 0x148 0x160 0x168 JP1 Off On Off On JP2 Off Off On On JP3 and JP4 determine data width data width configurations are shown below JP3 and JP4 must both be on or must both be off...

Page 11: ...8 Temperature Range The TS NVRAM2 is available in both standard temperature 20 to 70 degrees Celsius and in extended temperature range of 40 to 85 degrees Celsius 11...

Page 12: ...Appendix A Manual Revisions Date Revision Number Revision September 09 2005 0 9 Preliminary release September 16 2005 1 0 Initial release 12...

Reviews: