TS-7300 MANUAL
CONNECTORS AND HEADERS
5.9 COM3-COM4-COM5-COM6 Headers
The
TS-7300
has four 10-pin headers named COM3, COM4, COM5 and COM6. These
enable the four COM ports which are integrated on the FPGA. The FPGA must be loaded
with the TS-BITSTREAM provided by default. These 4 FPGA COM ports support TXD,
RXD, GND and the handshake lines RTS and CTS.
Table: TS-7300 COM3-4-5-6 Header Pin Out
NC
RTS
CTS
NC
NC
6
7
8
9
10
1
2
3
4
5
NC
RXD
TXD
NC
GND
By changing a specific register, the RTS signal will change into TXD2 and the CTS signal
will change to RXD2. Therefore, each COM port in the FPGA can become 2 ports,
totalizing 8 COM interfaces with none RTS and CTS handshake lines. Each COM port can
be switched independently for maximum flexibility. This allows 6, 7, 8, 9, or 10 COM ports
total on the
TS-7300
, all controlled via software.
The physical base address for the COM ports on the FPGA is
0x7200_0000
. Each COM
port is controlled by two 16-bit registers, therefore 32 bytes of memory is used for the
eight COM ports.
Table: FPGA COM ports addresses on TS-7300
COM port
I/O Addr
COM port
I/O Addr
COM3
BASE + 00
COM7
BASE + 10
COM4
BASE + 04
COM8
BASE + 14
COM5
BASE + 08
COM9
BASE + 18
COM6
BASE + 0C
COM10
BASE + 1C
All the FPGA COM ports can operate in both 8-bit mode or 9-bit mode. Technologic
Systems provides 8-bit mode and 9-bit mode RS-232 driver, named “tsuart73”, for all the
FPGA COM ports. Refer to the Linux for TS-ARM User's Guide for more information on
Linux driver support.
5.10 DIO1 Header
The DIO1 Header provides +3.3V, GND, and 9 digital I/O lines that may be used to
interface the
TS-7300
with a wide range of external devices. DIO lines DIO_0 thru DIO_7
are a byte-wide port using Port B on the EP9302 and are accessed via the data register at
address location
0x8084_0004
. The DDR for this port is at address location
0x8084_0014
.
© Apr, 2010 www.embeddedARM.com 37