TS-7250 MANUAL
CONNECTORS AND HEADERS
The Pin 4 of the DIO1 Header, in the default configuration, is accessed via bit 0 of Port C
in the EP9302. The address location
0x8084_0008
is Port C Data Register and
0x8084_0018
is Port C Directon Register.
When accessing these registers, it is important not to change the other bit positions in
these Port F registers. Other DIO1 Port functionality, used for dedicated
TS-7250
functions, utilize these same control registers. All accesses to these registers should use
read-modify-write cycles.
!
Warning
All pins on the DIO header use 0-3.3V logic levels. Do not drive these lines to 5V.
When the DIO pins are configured as outputs, they can “source” 4 mA or “sink” 8 mA and
have logic swings between GND and 3.3V. When configured as inputs, they have
standard TTL level thresholds and must not be driven below 0 Volts or above 3.3 Volts.
DIO lines DIO_0 thru DIO_3 have 4.7K Ohm “pull-up” resistors to 3.3V biasing these
signals to a logic”1”. The other DIO pins have 100K Ohm bias resistors biasing these
inputs to a logic “1”.
SPI Interface
The EP9302 Synchronous Serial Port is available on the DIO1 header. This port can
implement either a master or slave interface to peripheral devices that have either
Motorola SPI, or National Semiconductor Microwire serial interfaces.
The transmit and receive data paths are buffered with internal FIFO memories allowing up
to eight 16-bit values to be stored for both transmit and receive modes. The clock rate is
programmable up to 3.7 MHz and has programmable phase and polarity. The data frame
size is programmable from 4 to 16 bits.
By using some of the DIO1 Header pins as peripheral Chip Select signals, a complete
interface is available for addressing up to 9 SPI peripherals. The SPI bus pins are defined
in the table below:
Table: DIO1 Header Pin-Outs for SPI
DIO1 Pin
Name
Function
10
SPI_MISO
Master In/Slave Out
12
SPI_MOSI
Master Out/Slave In
14
SPI_CLK
Clock
6
SPI_Frame
SPI Frame pin
A fourth SPI bus function [SPI_Frame] is available by adding a 10 ohm resistor in the
position labeled R1 on
TS-7250
. This signal is not required for many SPI peripherals but
it may prove useful in some applications.
!
Warning
The SPI bus pins use 0-3.3V logic levels. Do not drive these lines to 5V.
Refer to the
EP9301 User's Guide
and see Chapter 19 for more details on using SPI bus.
Matrix Keypad
DIO signals DIO_0 thru DIO_7 are physically arranged to allow a 16-pin (2x8) ribbon
cable to directly connect a
4x4 matrix keypad.
Sample code is available for the Matrix
Keypad. Contact Technologic Systems for further information.
© Jan, 2010 www.embeddedARM.com 27
