TS-7250 MANUAL
PC/104 BUS EXPANSION
6 PC/104 BUS EXPANSION
The PC/104 is a compact implementation of the PC/AT ISA bus ideal for embedded
applications. Designers benefit from an established industry standard bus that already has
well-developed documentation and many compatible peripherals available in the market
place. The presence of a compact form-factor PC compatible standard has encouraged
the development of a broad array of off-the-shelf products, allowing a very quick time to
market for new products.
The electrical specification for the PC/104 expansion bus is identical to the PC ISA bus.
The mechanical specification allows for the very compact implementation of the ISA bus
tailor made for embedded systems. The full PC/104 specification is available from the
IEEE Standards Office, No. IEEE P996.1.
This bus allows multiple peripheral boards to be added in a self-stacking bus. Since the
electrical specs are identical (except for drive levels) to a standard PC ISA bus, standard
peripherals such as COM ports, Digital I/O, Ethernet ports, and LCD drivers may be easily
added.
Note
The
TS-7250
implements a sub-set of the full PC/104 bus. This allows the support
of many common I/O peripheral boards. Some of the PC/104 signals are not
supported; for example, the DMA signals. These pins are used on the
TS-7250
to
support data lines D8- D15. This means that a full 16-bit data bus implementation
of the PC/104 bus is possible by only using the 64-pin connector. The
supplemental 40-pin connector is only required for legacy boards – any new
design can implement a full 16-bit data bus with only the 64-pin connector.
PC/104 peripherals will appear in the
TS-7250's
physical address space in one of four
address regions depending upon whether it is emulating an x86 Memory cycle or I/O cycle
and whether it needs to be a 8-bit cycle or a 16-bit cycle. Each region is a full 1MB in size,
even though the I/O region will typically only use a 1 Kbyte region for legacy products.
Table: PC/104 Memory Map
Physical Address Region
Emulates x86 cycle
11E0_0000 thru 11E0_03FF
8-bit I/O cycles
21E0_0000 thru 21E0_03FE
16-bit I/O cycles
11A0_0000 thru 11AF_FFFF
8-bit Memory cycles
21A0_0000 thru 21AF_FFFE
16-bit Memory cycles
I/O cycles on the PC/104 expansion bus strobe either IOR# or IOW#, while Memory
cycles strobe the MEMR# or MEMW# signals. For example, a TS-SER1 peripheral board
can be jumper-selected as COM3, which would correspond to a PC I/O base address of
0x3E8. Since this is an 8-bit peripheral, this COM port must be accessed at the physical
base address of 0x11E0_03E8.
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