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TS-5300 User’s Manual 

Technologic Systems 

 05/21/09

 

 

10

6  Digital I/O 

There are 39 Digital Input/Output (DIO) lines available on the TS-5300.  These are available on 3 

headers labeled DIO1, DIO2, LCD.  In addition to the DIO signals, each header also has 5 Volt power 

and Ground available. The header labeled LCD can be used as 11 DIO lines or as an alphanumeric 

LCD interface (See Section 7).  24 of the DIO lines are arranged as three byte-wide ports that can be 

programmed as either inputs or outputs in groups of 4-bits.  8 more of the DIO lines can also be 

programmed as either inputs or outputs (in groups of 4-bits also).  The remaining 8 lines have a fixed 

configuration of 7 inputs and 1 output.  Three of the DIO lines can be programmed to cause interrupts. 

 

6.1  DIO1 Header 

The DIO1 port pr5V, GND, and 14 digital I/O lines that may 

be used to interface the TS-5300 with a wide range of external 

devices.  DIO lines DIO1_0 thru DIO1_7 are a byte-wide port 

accessed at I/O location Hex 7B, while the 6 other DIO lines 

DIO1_8 thru DIO1_13 are accessed in the lower 6 bits of I/O 

location Hex 7C. I/O location Hex 7A is a control port for DIO1.  The 

direction of DIO lines DIO1_0 thru DIO1_3 is controlled by bit 0 of 

I/O location Hex 7A, and the direction of DIO1_4 thru DIO1_7 is 

controlled by bit 1 of I/O location Hex 7A.  The direction of DIO1_8 

thru DIO1_11 is controlled by bit 5 of I/O location Hex 7A, while 

DIO1_12 and DIO1_13 are always inputs.  In all cases, when a control bit is a “1”, it is setting the 

corresponding DIO lines to be Outputs, while a “0” sets them to be Inputs.  All control bits at I/O location 

Hex 7A are initialized at reset to be “0”.  When bit 7 of I/O location Hex 7A is a “1”, DIO1_13 is connected 

to IRQ7 allowing this port to trigger an interrupt. 
All digital outputs on this port can source 4 mA or sink 8 mA and the digital inputs have standard TTL 

level thresholds and must not be driven below 0 Volts or above 5.0 Volts.   DIO lines DIO1_0 thru 

DIO1_7 have 4.7K

 pull-up resistors biasing these signals to a logic”1”. 

 

6.2  DIO2 Header 

The DIO2 port pr5V, GND, and 14 digital I/O lines.  DIO 

lines DIO2_0 thru DIO2_7 are a byte-wide port accessed at I/O 

location Hex 7E, while the 6 other DIO lines DIO2_8 thru DIO2_13 

are accessed in the lower 6 bits of I/O location Hex 7F. I/O 

location Hex 7D is a control port for DIO2.  The direction of DIO 

lines DIO2_0 thru DIO2_3 is controlled by bit 0 of I/O location Hex 

7D, and the direction of DIO2_4 thru DIO2_7 is controlled by bit 1 

of I/O location Hex 7D.  The direction of DIO2_8 thru DIO2_11 is 

controlled by bit 5 of I/O location Hex 7D, while DIO2_12 and 

DIO2_13 are always inputs.  In all cases, when a control bit is a 

“1”, it is setting the corresponding DIO lines to be Outputs, while a 

“0” sets them to be Inputs.  All control bits at I/O location Hex 7D are initialized at reset to be “0”.  When 

bit 7 of I/O location Hex 7D is a “1”, DIO2_13 is connected to IRQ5 allowing this port to trigger an 

interrupt.  
All digital outputs on this port can source 4 mA or sink 8 mA and the digital inputs have standard TTL 

level thresholds and must not be driven below 0 Volts or above 5.0 Volts.   DIO lines DIO2_0 thru 

DIO2_3 have 4.7K

 pull-up resistors biasing these signals to a logic”1”. 

DIO2_8 can be programmed to indicate the state of the TS-5300 LED.  When bit 0 of I/O location Hex 

79 is set, DIO2_8 will be a logic “1” when the LED is on.  Setting bit 0 of I/O location Hex 79, forces 

DIO2_8 to be an output regardless of the state of bit 5 at I/O location Hex 7D. 

5 V  16  15  DIO1_7 

DIO1_13  14  13  DIO1_6 

DIO1_12  12  11  DIO1_5 

DIO1_11  10  9  DIO1_4 

DIO1_10  8  7  DIO1_3 

DIO1_9  6  5  DIO1_2 

DIO1_8  4  3  DIO1_1 

GND  2  1  DIO1_0 

Figure 2 – DIO1 Header Pinout  

5 V  16  15  DIO2_7 

DIO2_13  14  13  DIO2_6 

DIO2_12  12  11  DIO2_5 

DIO2_11  10  9  DIO2_4 

DIO2_10  8  7  DIO2_3 

DIO2_9  6  5  DIO2_2 

DIO2_8  4  3  DIO2_1 

GND  2  1  DIO2_0 

Figure 4 – DIO2 Header Pinout  

Summary of Contents for TS-5300

Page 1: ...TS 5300 User s Manual...

Page 2: ...ls AZ 85268 480 837 5200 FAX 837 5300 info embeddedx86 com http www embeddedx86 com This revision of the manual is dated May 21 2009 All modifications from previous versions are listed in the appendix...

Page 3: ...t the RMA number on the outside of the package This limited warranty does not cover damages resulting from lighting or other power surges misuse abuse abnormal conditions of operation or attempts to a...

Page 4: ...as Digital I O 11 6 4 DIO on the PC 104 bus 11 7 LCD INTERFACE 11 8 MATRIX KEYPAD SUPPORT 12 9 THE 10 BASE T ETHERNET PORT 13 10 REAL TIME CLOCK 16 11 WATCHDOG TIMER 17 12 LED AND JUMPERS 18 13 PC 10...

Page 5: ...15h Function B000h Technologic Systems BIOS information 32 Int 15h Function B010h LED Control 32 Int 15h Function B042h Alphanumeric LCD Support 33 Int 15h Function B040h Matrix Keypad Support 33 Int...

Page 6: ...airly short This is because for the most part the TS 5300 is a standard x86 based PC compatible computer and there are hundreds of books about writing software for the PC platform The primary purpose...

Page 7: ...rough FFFFFh for improved performance a standard technique known as BIOS Shadowing The remainder of the Flash memory 896KB or 1920 KB is configured as two solid state disk SSD drives appearing as driv...

Page 8: ...iced that it is best to boot the host PC with a Compact Flash card installed in the SanDisk USB Reader The Compact Flash card can then be hot swapped inserted or removed without rebooting the host PC...

Page 9: ...ration a single twisted pair is used for transmitting and receiving Bit 6 at I O location 77h must be set to enable RTS mode or bit 7 can be set to enable Automatic mode In RTS mode the serial port RT...

Page 10: ...r both must be polled until empty before deasserting RTS when using the RTS mode The design gets more difficult when using the TX FIFO or when using a multi tasking OS such as Linux In Automatic mode...

Page 11: ...digital inputs have standard TTL level thresholds and must not be driven below 0 Volts or above 5 0 Volts DIO lines DIO1_0 thru DIO1_7 have 4 7K pull up resistors biasing these signals to a logic 1 6...

Page 12: ...utputs on this port can source 4 mA or sink 8 mA and the digital inputs have standard TTL level thresholds and must not be driven below 0 Volts or above 5 0 Volts LCD_7 and LCD_RS have 4 7K pull up re...

Page 13: ...P 8 Matrix Keypad Support The DIO2 port signals DIO2_0 through DIO2_7 may be configured to support a 4 x 4 matrix keypad When enabled BIOS firmware performs all the work making the matrix keypad appea...

Page 14: ...details The hardware settings for the CS8900A are stored in a non volatile EEPROM chip programmed before shipment The settings are interrupt IRQ12 I O address range 300h 30Fh and I O mapped operation...

Page 15: ...name lookups With the WATTCP CFG file properly setup and the 10 base T cable connected you should be able to ping other nodes on the network Ping example A ping www embeddedx86 com Technologic Systems...

Page 16: ...wide messages ENABLE yes Initialize on startup The TCP IP network settings are configured in the file etc sysconfig network_cfg here is a listing Technologic Systems General Network Configuration File...

Page 17: ...ck operation for a minimum of 10 years in the absence of power It is located at the standard PC I O addresses of Hex 070 and 071 The top 48 bytes index 50h through 7Fh are not used by the BIOS and are...

Page 18: ...tional failsafe feature In order to load the WDTMRCTL register a specific sequence of three word writes is required A 3333h followed by CCCCh followed by the value to be loaded into the WDTMRCTL regis...

Page 19: ...tivity to the Compact Flash card accesses to the CF causes the LED to flicker There are also two LEDs on the RJ 45 Ethernet connector that are controlled by the CS8900A Ethernet Controller and provide...

Page 20: ...TS 5300 User s Manual Technologic Systems 05 21 09 19 JP4 Fast Console is set to 115K baud BIOS messages and DOS console redirection Normal console with jumper removed is 9600 baud...

Page 21: ...ersion of the PC 104 bus We have found this allows the support of the vast majority of PC 104 boards including all of the above mentioned examples IRQ3 and IRQ4 are typically used by COM2 and COM1 and...

Page 22: ...4 3 Zmodem Downloads Using the Zmodem protocol to send files to and from the TS 5300 is simple and straightforward The only requirement is a terminal emulation program that supports Zmodem and virtual...

Page 23: ...ur application code the debugger will automatically be invoked To resume type the G command to GO or continue on with the rest of initialization From DOS ROM by typing INT3 at the command prompt If th...

Page 24: ...tandard BIOS routines for display and keyboard input which are rerouted to the serial port Any program that accesses the video or keyboard hardware directly will not work Keyboard redirection is limit...

Page 25: ...the CMOS memory on every boot any changes will be lost Basic CMOS Configuration Setup disk drives drive mapping boot order misc Custom Configuration Setup custom features for Technologic Systems board...

Page 26: ...ot installed Ext Floppy 1 Not installed Ide 3 Not installed 31MB E X Tab to select or to modify Esc to return to main menu The factory defaults shown will first attempt to boot from Compact Flash as D...

Page 27: ...TS 5300 User s Manual Technologic Systems 05 21 09 26 change the IDE DRIVE GEOMETRY for Ide 2 to AUTOCONFIG PHYSICAL and change the DRIVE ASSIGNMENT for Drive D to Ide 2 Sec Master...

Page 28: ...ine when to flush cache to SDRAM This setting defaults to Write Through and may be set to Write Back by the user to optimize performance Refer to the AMD Elan SC520 users manual section 8 4 2 2 for mo...

Page 29: ...menu allows BIOS extension ROMs to be copied to SDRAM in upper memory regions to reduce access times Execution directly from ROM is significantly slower than executing from SDRAM The region from C000...

Page 30: ...logic Systems 05 21 09 29 Appendix A Board Diagram and Dimensions Appendix B Operating Conditions Operating Temperature 0 to 70 C Extended temperature range is optional Operating Humidity 0 to 90 rela...

Page 31: ...1M 15M or 31M or 63M BIOS Shadow RAM E0000h 896k 128k Elan520 Configuration Registers DF000h 892k 4k PC 104 Bus D2000h 840k 52k DiskOnChip or SRAM D0000h 832k 8k PC 104 Bus or SDRAM user configurable...

Page 32: ...s 080h 0FFh Internal Elan520 peripherals 074h 07Fh DIO and Control registers 072h 073h LCD port 070h 071h RTC and CMOS memory 060h 064h Keyboard Controller TS 9500 000h 05Fh Internal Elan520 periphera...

Page 33: ...0h EXIT CY 0 carry flag AH 0 AL SP_VERSION For standard versions of the BIOS this is 0 An SP number is assigned when custom modifications are made to the BIOS for a client and it is returned in this r...

Page 34: ...the following 0 9 A D and returns the scan code for Carriage Return A custom translation table is 16 words long where each word is a scan code ASCII pair for a key Information on scan codes can be fou...

Page 35: ...is not pressed ENTRY AX B021h EXIT CY 0 carry flag AH 00 BX 00 JP5 not installed De asserted 01 JP5 installed Asserted Int 15h Function B020h Jumper Pin Status This function returns the status of the...

Page 36: ...The baud rate clock for each COM port is controlled by bit 2 in the UART Control Register UART1CTL and UART2CTL UART1CTL DFCC0h UART2CTL DFCC4h Clearing bit 2 to a 0 will change the clock to the 10X...

Page 37: ...downloads Components 12887 pdf Intel 386EX User s Guide http developer intel com design intarch manuals 272485 htm Maxim Integrated Products http www maxim ic com Omen Technologies http www omen com P...

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