Technologic Systems TS-5300, User Manual

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TS-5300 User’s Manual Technologic Systems
05/21/09
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Appendix D - System I/O Map
The following table lists the I/O addresses used
by the system. This is all a very standard PC
compatible I/O map. All other I/O locations from
100h through 3FFh are available on the PC/104
expansion bus.
The I/O ranges of 100h – 13Fh and 200h – 26Fh
are excellent choices for PC/104 daughter board
I/O usage. When designing a custom PC/104
daughter board, a User Chip Select is available
on PC/104 Bus pin B19 that decodes the I/O
range 140h – 15Fh. This can make for a simpler
and more cost-effective design.
Hex Address Resource
400h - FFFFh PC/104 Bus
(Not recommended for use)
3F8h – 3FFh COM1
3F6h – 3F7h Primary IDE (Compact Flash)
3E8h – 3EFh Reserved for COM3
3B4h – 3DFh Video (TS-9500)
376h – 377h Secondary IDE (TS-9500)
300h – 30Fh CS8900A Ethernet controller
2F8h – 2FFh COM2
2E8h – 2EFh Reserved for COM4
278h – 27Ah Reserved for LPT1
1F0h – 1F7h Primary IDE (Compact Flash)
198h – 19Fh Registers on TS-9500
196h – 197h Reserved for A/D Converter
170h – 177h Secondary IDE (TS-9500)
140h – 15Fh User Chip Select (PC/104 Bus)
080h – 0FFh Internal Elan520 peripherals
074h – 07Fh DIO and Control registers
072h – 073h LCD port
070h – 071h RTC and CMOS memory
060h – 064h Keyboard Controller (TS-9500)
000h – 05Fh Internal Elan520 peripherals
Table 11 – TS-5300 I/O Map
I/O
Address
R / W Resource
74h Read Product Code
50h = Product Code for TS-5300
75h Read
Read Bit 0 = SRAM Option
Bit 1 = RS-485 Option
76h Reserved
77h
R/W
Read
Read
Read
Read
Read
Read Bit 0 = LED (1 = ON)
Bit 1 = JP1
Bit 2 = JP2
Bit 3 = JP3
Bit 4 = JP4
Bit 5 = JP5
Bit 7 = JP8
78h Reserved
79h R/W
R/W
Read Bit 0 = Enable DIO2_8 to track LED
Bit 1 = PC/104 pin A1 drives IRQ1
Bit 2 = Status of PC/104 pin A1
7Ah R/W
Control Register for DIO1
Bit 0 = Direction of DIO1_0 – DIO1_3
Bit 1 = Direction of DIO1_4 – DIO1_7
Bit 5 = Direction of DIO1_8 – DIO1_11
Bit 7 = Enable DIO1_13 to drive IRQ7
7Bh R/W DIO1_0 thru DIO1_7 (Bits 0-7)
7Ch R/W DIO1_8 thru DIO1_13 (Bits 0-5)
7Dh R/W
Control Register for DIO2 and LCD
Bit 0 = Direction of DIO2_0 – DIO2_3
Bit 1 = Direction of DIO2_4 – DIO2_7
Bit 2 = Direction of LCD_0 – LCD_3
Bit 3 = Direction of LCD_4 – LCD_7
Bit 4 = Enable LCD Mode
Bit 5 = Direction of DIO2_8 – DIO2_11
Bit 6 = Enable LCD_RS to drive IRQ1
Bit 7 = Enable DIO2_13 to drive IRQ5
7Eh R/W DIO2_0 thru DIO2_7 (Bits 0-7)
7Fh R/W DIO2_8 thru DIO2_13 (Bits 0-5)
Table 12 – TS-5300 DIO and Control Registers