EDM1-IMX6PLUS HARDWARE MANUAL
– VER 1.00 – NOV 16 2016
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64
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3.17.3. Power Sequencing for ATX based configurations
EDM1-IMX6PLUS input power sequencing requirements for ATX based configurations are as follow:
If a backup RealTime Clock (RTC) is required in the host system. We recommend to design an RTC
circuit on the EDM carrier board. For example the Maxim Integrated connected over the general
purpose I
2
C can be used.
Start Sequence:
Optional VCC_RTC must come up at the same time or before 5VSB comes up.
5VSB must come up at the same time or before VCC comes up.
A 5V return signal is generated on EDM PIN# 251
PWGIN must be active at the same time or after VCC comes up.
Stop Sequence:
PWGIN must be inactive at the same time or before VCC goes down
VCC must go down at the same time or before 5VSB goes down
5VSB must go down at the same time or before VCC_RTC goes down
Table 41 - Input Power Sequencing for ATX based configurations
Item
Description
Value
T1
VCC_RTC rise to 5VSD rise
≥ 0 ms
T2
5VSB rise to VCC rise
≥ 0 ms
T3
VCC rise to PWGIN (S3) rise
≥ 0 ms
T4
PWGIN (S3) fall to VCC fall
≥ 0 ms
T5
VCC fall to 5VSB fall
≥ 0 ms
T6
5VSB fall to VCC_RTC fall
≥ 0 ms
Figure 15 - Input Power sequence for ATX based configurations
Summary of Contents for EDM1-IMX6PLUS
Page 1: ...EDM1 IMX6PLUS VER 1 00 November 16 2016 ...
Page 21: ...EDM1 IMX6PLUS HARDWARE MANUAL VER 1 00 NOV 16 2016 Page 21 of 83 Figure 8 eMMC Schematics ...
Page 23: ...EDM1 IMX6PLUS HARDWARE MANUAL VER 1 00 NOV 16 2016 Page 23 of 83 Figure 9 NAND IC Schematics ...
Page 27: ...EDM1 IMX6PLUS HARDWARE MANUAL VER 1 00 NOV 16 2016 Page 27 of 83 Figure 11 WiFi BT Schematics ...