TCL 46P11FZE, Service Manual

Page: 67 / 116

Specifications are subject to change without notice
MT5362ANG/B
Approval Datasheet
Page 17 of 35
MEDIATEK CONFIDENTIAL, NO DISCLOSURE
C1 RDQ6 I/O 8.1~10.1 mA memory data bit 6
B3 RDQ7 I/O 8.1~10.1 mA memory data bit 7
G4 RDQ8 I/O 8.1~10.1 mA memory data bit 8
F3 RDQ9 I/O 8.1~10.1 mA memory data bit 9
F1 RDQ10 I/O 8.1~10.1 mA memory data bit 10
F2 RDQ11 I/O 8.1~10.1 mA memory data bit 11
E3 RDQ12 I/O 8.1~10.1 mA memory data bit 12
G3 RDQ13 I/O 8.1~10.1 mA memory data bit 13
F4 RDQ14 I/O 8.1~10.1 mA memory data bit 14
G5 RDQ15 I/O 8.1~10.1 mA memory data bit 15
U3 RDQ16 I/O 8.1~10.1 mA memory data bit 16
T1 RDQ17 I/O 8.1~10.1 mA memory data bit 17
T4 RDQ18 I/O 8.1~10.1 mA memory data bit 18
T2 RDQ19 I/O 8.1~10.1 mA memory data bit 19
R3 RDQ20 I/O 8.1~10.1 mA memory data bit 20
R4 RDQ21 I/O 8.1~10.1 mA memory data bit 21
T3 RDQ22 I/O 8.1~10.1 mA memory data bit 22
R5 RDQ23 I/O 8.1~10.1 mA memory data bit 23
Y2 RDQ24 I/O 8.1~10.1 mA memory data bit 24
W4 RDQ25 I/O 8.1~10.1 mA memory data bit 25
Y3 RDQ26 I/O 8.1~10.1 mA memory data bit 26
W3 RDQ27 I/O 8.1~10.1 mA memory data bit 27
V5 RDQ28 I/O 8.1~10.1 mA memory data bit 28
AA2 RDQ29 I/O 8.1~10.1 mA memory data bit 29
W5 RDQ30 I/O 8.1~10.1 mA memory data bit 30
Y1 RDQ31 I/O 8.1~10.1 mA memory data bit 31
E4 RDQM0 O 8.1~10.1 mA memory data mask bit 0
F5 RDQM1 O 8.1~10.1 mA memory data mask bit 1
V4 RDQM2 O 8.1~10.1 mA memory data mask bit 2
U5 RDQM3 O 8.1~10.1 mA memory data mask bit 3
D2 RDQS0 I/O 8.1~10.1 mA memory positive data strobe bit 0
D1 RDQS0_ I/O 8.1~10.1 mA memory negative data strobe bit 0
E1 RDQS1 I/O 8.1~10.1 mA memory negative data strobe bit 1
E2 RDQS1_ I/O 8.1~10.1 mA memory negative data strobe bit 1
U1 RDQS2 I/O 8.1~10.1 mA memory positive data strobe bit 2
V1 RDQS2_ I/O 8.1~10.1 mA memory negative data strobe bit 2
W1 RDQS3 I/O 8.1~10.1 mA memory negative data strobe bit 3
W2 RDQS3_ I/O 8.1~10.1 mA memory negative data strobe bit 3
A5 REXTDN I N/A memory external pull-down reference resister
B5 REXTUP I N/A memory external pull-up reference resister
J3 RODT O 8.1~10.1 mA memory on die termination enable
J4 RRAS_ O 8.1~10.1 mA memory row address strobe 2
P6 RVREF I N/A memory VREF
P1 RWE_ O 8.1~10.1 mA memory write enable 2
LVDS
C9 E0P O 2~8 mA LVDS Tx even channel positive output bit 0
D9 E0N O 2~8 mA LVDS Tx even channel negtive output bit 0
C10 E1P O 2~8 mA LVDS Tx even channel positive output bit 1
07.FRQILGHQWLDO
O
14
O
ata bit 15 5
LDO
mory data bit 16 ta bit 16
WLD
memory data bit 17 mory data bit 17
WL
.1 mA memory data bit 1 mA memory data bit
G QW
H
8.1~10.1 mA memory da ~10.1 mA memory
GHHHQ
I
H
I/O 8.1~10.1 mA me 8.1~10.1 mA me
IIILGH
HH
I
H
I/O 8.1~10.1 mA O 8.1~10.1 mA
IIILG
QI
I/O 8.1~10 I/O 8.1~10
QQQIIIL QI
RDQ23 I/O I/O
RQQQIII
QI
RDQ24 RDQ24
FRQQQ
.
Q
W4 RDQ25 4 RDQ25
... F
R
.
Y3 RDQ26 Y3
7...
F
07.
W3 R 3 R
07 07... 07.
V5 V5
07 07 07
A A
000
)RU7&/2QO\
bit 24
y data bit 25 data bit 25
O\
memory data bit 26 a bit 26
O\
2
A memory data bit 27 memory data bit 27
222QO\ 2
~10.1 mA memory data bit 28 memory dat
222QO 2
8.1~10.1 mA memory da 8.1~10.1 mA memor
/ 222Q
&
2
I/O 8.1~10.1 mA mem I/O 8.1~10.1 m
&&&/
222
7&
2
I/O 8.1~10.1 mA I/O 8.1~10.1 m
777&&&/ 7&
M0 O 8.1~10.1 O 8.1
777&&& 7&
RDQM1 O 8 M1 O
7777
RDQM2 O RDQM2
U
)R
RDQM3 RDQM3
)R )R )RU )R
RDQS0 RDQ
)R )R )R )R
RD
))))
1
P P
1R
DN DN
1R'LVFORVXUH
H H
k bit 1
UH
ata mask bit 2 bit 2
XUH
mory data mask bit 3 mory data mask bit 3
VXU
memory emor positive data stro ositive data st y
ORVX
1 mA memory memory negative negative y y
OR
F
8.1~10.1 mA memory ~10.1 mA memory ne ne y y
FFFO F
/O 8.1~10.1 mA mem O 8.1~10.1 mA mem
LVFFF
'
F
I/O 8.1~10.1 mA O 8.1~10.1 mA
'''LV '
I/O 8.1~10.1 8.1~10.
'''L '
QS3 I/O 8 QS3 I/O 8 1R
''''
QS3_ I S3_
1R 1R 1