Specifications are subject to change without notice
MT5362ANG/B
Approval Datasheet
Page 6 of 35
MEDIATEK CONFIDENTIAL, NO DISCLOSURE
2
FUNCTIONAL BLOCK DIAGRAM
DRAM Bus
IO Bus
UART
PWM
PVR
MS,SD
Audio DSP
Watchdog
Audio I/F
SPDIF, I
2
S
RTC
2-D Graphic
Vplane
scaler/PIP
OSD
scaler
VADCx4
TS
Demux
TV
Decoder
HDMI In
I/F
LVDS
Mix andPost
Processing
DDR
DRAM
Controller
BIM
ARM
HDMI
Rx
Panel
VDO-In
NAND Flash
Audio DAC
CKGEN
Audio
Demod
MDDi
Audio In
Audio
ADC
Serial Flash
Servo ADC
BScan
JTAG
2ch USB2.0
SIF
IrDA
CVBS/
YC Input
JPEG,MPEG
H.264
TVE
VDAC
CVBS
PreProc
Audio
Input
Standby uP
DVB-T
ATD
07.FRQ
0
7.
7.
07
07
Au
7.
7.
FR
.
RQILGHQW
LG
IL
IL
O-In
W
W
L
LGHQ
LGHQ
Audio In
GHQ
G
WLDO
LDO
LDO
LDO
LVDS
W
W D
Panel
l
WL
WL
dio
A
W
G
G
J
O
O
VD
C
IL
QIL
QIL
PrePro
RQ
)RU7&/
U 7
&/
&/
UA
7&
7&
VR
F, I
F, I
2
S
S
7&/
7&/
RT
/ 2QO\
2QO\
DRAM Bus
DRAM Bus
2QO\
IO Bus
O Bus
2
2
2
O
O
2Q
\
&/
2
&/
2
0
7&/
7&/
SIF
7&
7&
1R'LVFORVXUH
XUH
U
U
UH
UH
AN