Factory Alignment Specification
Test Alignment Specification for MT62S-LA.doc (Page 12 of 16)
Appendix
p
CVBS/RGB/CMP/VGA Relative Matrix Offset and WARM/COOL Relative
Matrix Offset
These offsets should be done in the production by AOE.
Appendix
q
IC should be pre-copied before SMT process:
,WHP
7&/31
3DFNDJH
5HPDUNV
8
$7&%%
62,&
+'0,,1387(','
8
$7&%%
62,&
3&,1387(','
8
0&01%
62,&
+'0,+'&3.(<
8
030)%
62
070$,162)7:$5(
80
:;$9%
62,&
0(0&62)7:$5(
