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Octa Channel TDC - Release 443:
• 19” 3HE Rack Mount Housing
• Number of Stop Inputs: 16
• Number of Start Inputs: 1 (common start input usable as reset of the internal clock resolution adjust
mode: quartz-accurate, adjustable resolution, insensitive to temperature variations, adjustable via
software (no calibration necessary)
• Digital time bin resolution per channel: 27.4ps
• 5.5ns pulse-pair resolution on one channel and 0ns between two channels
• Trigger to rising edge
• Start retrigger rate (max): 9MHz
• Measurement range: 0ns – 40µs in start-stop operation
(measurement range of 40µs corresponds to a start frequency of 25kHz)
• Internal start frequency divider (2-, 4-, 8-, 16- and 32-fold divider)
• Dynamic range: 2E19
• All channels provide precisely an equal resolution
• 32-fold multi-hit capability per channel
• 80MHz internal device measurement rate
• Stop Signal Input: Low voltage PECL (differential signal) on 4x differential multiline connector (adapted
to connector layout of ACU of the detector head)
• External Start Signal Input: Low voltage TTL on 50Ohm BNC socket
• External Start Signal Output: Low voltage TTL on 50Ohm BNC socket
• Device Synchronization Signal Input: Low voltage TTL on 50Ohm BNC socket
• Device Synchronization Signal Output: Low voltage TTL on 50Ohm BNC socket
• Tag Signal, State Signal, Shutter Signal and Master Reset Input: Low voltage TTL on 50Ohm BNC socket
• Gate Signal Output: Low voltage TTL on 50Ohm BNC socket
• Ethernet Interface for Data Transfer
Time-to-Digital-Converter Octa Channel TDC Manual | Surface Concept GmbH
