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Time-to-Digital Converter Octa Channel TDC Manual
4.2.7 Master Reset Input
The master reset input is treated as an additional sign signal within the TDC and is counted up in a software
counter within the dll.
In addition the master reset input is connected to the reset pin of the TDC chip. Each time a signal is
applied to the master reset input the corresponding software counter is counting up and the input and
output FIFOs of the TDC chip are cleared (all old TDC data are erased).
A LVTTL (low voltage TTL) signal on 50Ohms has to be applied to the “MASTER RESET IN“ (BNC socket) of
the TDC.
TimeTag = 0
TimeTag = 1
TimeTag = 2
TimeTag = 3
TimeTag = 4
TimeTag = 5
TimeTag = 6
;tag counting is switched off and any signal to the “TAG IN“ is ignored, nBytes can be
set to 4 or 8 (see below for further details on nBytes). Also any state input, master reset
input or ADC input signals are ignored.
;the tag is counting the internal 80MHz clock signal of the FPGA and is therefore
functioning as a timer. Any signal to the “TAG IN“ is ignored. This mode is not working in
combination with the state input.
;the tag is counting the external LVTTL signal applied to the “TAG IN“. The counter is
reset with the start of a new measurement. This mode is not working in combination
with the state input.
;tag counting is switched off and any signal to the “TAG IN“ is ignored. This value must be
set for using the ADC functionality in combination with the state input and the master
reset input.
;corresponds to the setting of TimeTag = 3.
;must be set for using the tag as timer (similar to TimeTag = 1) but in combination with
the state input. A pulse on “TAG IN“ resets the timer to 0.
;must be set for using the tag as counter (similar to TimeTag = 2) but in combination with
the state input.
The number of bits which are available for each detector event (x, y, t) is defined by an additional parameter
called “nBytes” in the tdc_gpx3.ini file.
The corresponding entry in the tdc_gpx3.ini file is:
nBytes = X
X is an integer value of either 4 or 8.
The default setting is 8
.
Time-to-Digital-Converter Octa Channel TDC Manual | Surface Concept GmbH
