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X7SBi-LN4/X7SBi-LN4-TM User's Manual
Adjacent Cache Line Prefetch (Available when supported by the CPU)
The CPU fetches the cache line for 64 bytes if this option is set to Disabled. The
CPU fetches both cache lines for 128 bytes as comprised if Enabled. The options
are Disabled and
Enabled.
Set Maximum Ext. CPUID=3
When set to Enabled, the Maximum Extended CPUID will be set to 3. The options
are
Disabled
and Enabled.
Echo TPR
Set to
Enabled
to prevent xTPR messages from being sent to the system. The
options are Disabled and
Enabled
.
C1 Enhanced Mode (Available when supported by the CPU)
Set to Enabled to enable the Enhanced Halt State to lower CPU voltage/frequency
to prevent overheat. The options are Enabled and
Disabled
. (
Note:
please refer
to Intel’s web site for detailed information.)
Intel <R> Virtualization Technology (Available when supported by the CPU.)
Select Enabled to use the feature of Virtualization Technology to allow one platform
to run multiple operating systems and applications in independent partitions, creat-
ing multiple "virtual" systems in one physical computer. The options are Enabled
and Disabled. (Note: If there is any change to this setting, you will need to power
off and restart the system for the change to take effect.) Please refer to Intel’s web
site for detailed information.
No Execute Mode Memory Protection (Available when supported by the
CPU and the OS.)
Set to
Enabled
to enable Execute Disable Bit and allow the processor to classify
areas in the memory slot where an application code can execute and where it can-
not, and thus preventing a worm or a virus from inserting and creating a flood of
codes to overwhelm the processor and damage the system during an attack.
Note
: this feature is available when your OS and your CPU support the
functionality of Execute Disable Bit. The options are Disabled and
En-
abled
. For more information regarding hardware/software support for this
function, please refer to Intel's and Microsoft's web sites.
Summary of Contents for SUPERO X7SBi-LN4
Page 1: ... X7SBi LN4 X7SBi LN4 TM USER S MANUAL Revision 1 0b ...
Page 52: ...2 34 X7SBi LN4 X7SBi LN4 TM User s Manual Notes ...
Page 88: ...4 30 X7SBi LN4 X7SBi LN4 TM User s Manual Notes ...
Page 90: ...A 2 X7SBi LN4 X7SBi LN4 TM User s Manual Notes ...
Page 96: ...X7SBi LN4 X7SBi LN4 TM User s Manual C 4 Notes ...