Supero SUPER P6DGE, User'S And Bios Manual

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BIOS User's Manual
5-12
8bit I/O Recovery Time
This option specifies the length of a delay inserted between consecutive
8-bit I/O operations. The settings are Disabled, 1 SYSCLK, 2 SYSCLKs,
3 SYSCLKs, 4 SYSCLKs, 5 SYSCLKs, 6 SYSCLKs, 7 SYSCLKs or 8
SYSCLKs.
16bit I/O Recovery Time
This option specifies the length of a delay inserted between consecutive
16-bit I/O operations. The settings are Disabled, 1 SYSCLK, 2
SYSCLKs, 3 SYSCLKs, 4 SYSCLKs, 5 SYSCLKs, 6 SYSCLKs, 7
SYSCLKs or 8 SYSCLKs.
PIIX4 SERR#
This signal is asserted to indicate a PIIX4 System Error condition. The
settings for this option are Enabled or Disabled. The Enabled option
enables the SERR# signal for the Intel PIIX4 chip.
USB Passive Release
GX releases USB bus when it is idle to maximize the USB bus usage.
The settings for this option are Enabled or Disabled. Set this option to
Enabled to enable passive release for USB.
PIIX4 Passive Release
This option functions similarly to USB Passive Release. The settings for
this option are Enabled or Disabled. Set to Enabled to enable passive
release for the Intel PIIX4 chip.
PIIX4 Delayed Transaction
GX is capable of PIIX4 transaction to improve PIIX4 interrupt efficiency.
The settings for this option are Enabled or Disabled. Set this option to
Enabled to enable delayed transactions for the Intel PIIX4 chip.
Type F DMA Buffer Control1
Type F DMA Buffer Control2
These options specify the DMA channel where Type F buffer control is
implemented. The settings are Disabled, Channel-0, Channel-1, Chan-
nel-2, Channel-3, Channel-4, Channel-5, Channel-6 or Channel-7.
DMA0 Type
DMA1 Type
DMA2 Type
DMA3 Type
DMA4 Type