Chapter 4: BIOS
4-5
Channel Interleaving
This option enables channel memory interleaving. Options include
Auto
or Disabled.
CS Sparing
This setting will reserve a spare memory rank in each node when enabled.
Options are Enabled and
Disabled
.
Bank Swizzle Mode
This setting
Enables
or Disables the bank swizzle mode.
ECC Confi guration
ECC Mode
This submenu affects the DRAM scrub rate based on its setting. Options
include Disabled,
Basic
, Good, Super, Max and User. Selecting User
activates the other options for user setting.
DRAM ECC Enable
This setting allows hardware to report and correct memory errors
automatically, maintaining system integrity. Options are
Enabled
or
Disabled. This is option is only active if ECC Mode above is set to
User
.
DRAM Timing Confi guration
DRAM Timing Confi g
This option allows you to set the DRAM timing confi guration for the system.
Options include
Auto
or Manual.
Memory Clock Speed
This options sets the memory clock speed. Options include 200 Mhz,
266 Mhz, 333 Mhz, 400 Mhz, 533 Mhz, 667 Mhz, 800 Mhz and 933 Mhz.
IOMMU
This setting is used to enable or disable or set the GART size in systems
without AGP. Options include Enabled and
Disabled
.
Memory Timing Parameters
Use this setting to select which node's timing parameters to display. Options
include
CPU Node 0
and CPU Node 1.