Chapter 4: BIOS
4-9
X
Slot1 PCI-X 133/100 MHz, Slot2 PCI-X 133/100 MHz, Slot3
PCI 33 MHz, Slot4 PCI-Exp. x8/x4, Slot5 PCI 33 MHz, and
Slot6 PCI-Exp. x16
Access the submenu for each of the settings above to make changes to the fol-
lowing:
Option ROM Scan
When enabled, this setting will initialize the device expansion ROM. The options
are
Enabled
and Disabled.
Enable Master
This setting allows you to enable the selected device as the PCI bus master. The
options are
Enabled
and Disabled.
Latency Timer
This setting allows you to set the clock rate for Bus Master. A high-priority, high-
throughout device may benefi t from a greater clock rate. The options are
Default
,
0020h, 0040h, 0060h, 0080h, 00A0h, 00C0h, and 00E0h. For Unix, Novell and
other Operating Systems, please select the option: other. If a drive fails after the
installation of a new software, you might want to change this setting and try again.
A different OS requires a different Bus Master clock rate.
Large Disk Access Mode
This setting determines how large hard drives are to be accessed. The options are
DOS or Other (for Unix, Novelle NetWare and other operating systems).
X
Advanced Chipset Control
Access the submenu to make changes to the following settings.
Warning
: Take caution when changing the Advanced settings. An incorrect
setting, a very high DRAM frequency or an incorrect DRAM timing may
cause the system to become unstable. When this occurs, reset the setting
to the default setting.
Crystal Beach Features
Select
Enabled
to use the Intel I/O AT (Acceleration Technology) to accelerate
the performance of TOE devices. (
Note:
A TOE device is a specialized, dedicated
processor that is installed on an add-on card or a network card to handle some
or all packet processing of this add-on card. For this motherboard, the TOE de-
vice is built inside the ICH9R South Bridge chip.) The options are
Enabled
and
Disabled.
