Chapter 2: Installation
2-21
T-SGPIO1/2
Pin Defi nitions
Pin# Defi nition
Pin Defi nition
1
NC
2
NC
3
Ground
4
DATA Out
5
Load
6
Ground
7
Clock
8
NC
JPW2
J6
JPW1
JPL2
JPL1
JWD1
JI2C2
JPF
JI2C3
JI2C4
JI2C1
JP1
JWOR1
JL1
JOH1
JP3
JD1
FAN8
FAN4
FAN3
FAN7
FAN5
FAN2
LES2
LES1
LE1
DIMM1-1
DIMM1-2
DIMM0-3
DIMM1-3
DIMM0-2
DIMM0-1
SP1
CD1
JC2
J5
FAN6
JPW3
FAN1
JF1
I-button
Battery
BIOS
JWOL1
S I/O
Audio CTRL
LAN
LAN
CTRL
CTRL
Intel 5100
MCH
CPU1
CPU2
Intel
ICH9R
PXH-V
SAS0~3
SAS4~7
ITE
CTRL
X7DCA-i
SAS
CTRL
T-SGPIO2
IDE1
FLOPPY
USB4/5
USB6/7
I-SATA5
I-SATA4
I-SATA3
I-SATA2
I-SATA1
I-SATA0
USB9
CPU
COM2
USB
2/3
0/1/
USB8
J3P1
AUDIO
JAR
DIMM3A
DIMM3B
DIMM2A
DIMM2B
DIMM1B
DIMM1A
SLOT6 PCI-E X16
SLOT1 PCI-X 133/100MHz
SLOT2 PCI-X 133/100MHz
SLOT3 PCI 33MHz
SLOT4 PCI-E X4 (in X16 slot)
SLOT5 PCI 33MHz
SLOT7 SIMLP IPMI
LAN1/2
KB/MS
PRINTER
COM1
BANK3
BANK2
BANK1
FAN1
T-SGPIO1
JBT1
JPS1
A
A. T_SGPIO1
B. T_SGPIO2
C. Power SMB
C
B
T-SGPIO Headers
Two T-SGPIO (Serial-Link General Pur-
pose Input/Output) headers are located
at J14 and J15 on the motherboard.
These headers are used to commu-
nicate with the Seriel-Link System
Monitoring chip on the backplane. See
the table on the right for pin defi nitions.
Refer to the board layout below for the
locations of the headers.
Note:
NC= No Connections
Power SMB (I
2
C) Connector
Power SMB (I
2
C) Connector (J6) moni-
tors the status of the power supply, fan
and system temperature. See the table
on the right for pin defi nitions.
PWR SMB
Pin Defi nitions
Pin# Defi nition
1
Clock
2
Data
3
PWR Fail
4
Ground
5
+3.3V