Super X11DPU-X/-XLL User's Manual
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DCU IP Prefetcher
I
f this item is set to Enable, the IP prefetcher in the DCU (Data Cache Unit) will prefetch IP
addresses to improve network connectivity and system performance. The options are
Enable
and Disable.
LLC Prefetch
If this feature is set to Enable, LLC (hardware cache) prefetching on all threads will be
supported. The options are
Disable
and Enable.
Extended APIC (Extended Advanced Programmable Interrupt Controller)
Based on the Intel Hyper-Threading technology, each logical processor (thread) is assigned
256 APIC IDs (APIDs) in 8-bit bandwidth. When this feature is set to Enable, the APIC ID
will be expanded from 8 bits to 16 bits to provide 512 APIDs to each thread to enhance CPU
performance. The options are
Disable
and Enable.
AES-NI
Select Enable to use the Intel Advanced Encryption Standard (AES) New Instructions (NI) to
ensure data security. The options are
Disable
and Enable.
Advanced Power Management Configuration
Power Technology
This feature allows for switching between stored CPU Power Management profiles. The
options are Disable, Energy Efficient and Custom.
CPU P State Control
SpeedStep (PStates)
EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically adjust
processor voltage and core frequency in an effort to reduce power consumption and heat
dissipation. Please refer to Intel’s website for detailed information. The options are Disable
and
Enable
.
EIST PSD Function (Available when SpeedStep is set to Enable)
Use this item to configure the processor's P-State coordination settings. During a P-State,
the voltage and frequency of the processor will be reduced when it is in operation. This
makes the processor more energy efficient, resulting in further energy gains. The options
are
HW_ALL
, SW_ALL and SW-ANY.
Summary of Contents for X11DPU-X
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