50
Super X11DPU-X/-XLL User's Manual
IPMI CODE
BIOS
LICENSE
BAR CODE
DESIGNED IN USA
REV:1.01A
X11DPU-X
CPU2
CPU1
PCH
SXB1A
PCH_PORT1
SXB1_2
SXB1C
CPU1_PORT3
CPU2_PORT3
CPU2_PORT1A
SXB2
CPU2_DMI
SXB1
PSU1
PSU2
SXB3B
SXB3A
SXB3
CPU2_PORT2
CPU1_PORT1
CPU1_PORT2A
VPP_CPU1
SXB3C
JUIDB2
IPMI_LAN
COM1
VGA
USB0/1(3.0)
LED1
UM5
BIOS
JIPMB1
IPMI
LEDM1
JPG1
JLAN1
BMC
JPME2
JBR1
JPME1
JRK1
RAID KEY-1
JSDCARD1
JBT1
JP2
S-SATA5
SP1
JWD1
JVRM1
BT1
U45
I-SATA0~3
I-SATA4~7
S-SATA0~3
S-SATA4
JSD1
JSD2
USB2(3.0)
JUSBA1
USB3/4(3.0) JUSB3
TP
M/
PORT80
JTPM1
T-SGPIO3
FAN3
FAN2
FAN1
FAN4
FAN5
FAN6
FAN7
FAN8
P1-DIMMF1 P1-DIMME1 P1-DIMMD1 P1-DIMMD2
P1-DIMMA2 P1-DIMMA1 P1-DIMMB1 P1-DIMMC1
JL1
P2_NVMe1
P2_NVMe2
NVME12
NVME13
P2-DIMMM1 P2-DIMML1 P2-DIMMK1 P2-DIMMK2
P2-DIMMG2 P2-DIMMG1 P2-DIMMH1 P2-DIMMJ1
VPP_CPU2
JNVI2C2
JF1
LE2
P1_NVMe1
JNVI2C1
P1_NVMe2
NVME 10 NVME11
GP
U
PW
R3
JG
PW
3
GP
U
PW
R1
JG
PW
1
GPU PWR4
BP PWR3
BP PWR4
BP PWR1
BP PWR2
JPW1
JPW2
JPW3
JGPW4
JGPW2
JPW4
GPU PWR2
TPM/Port 80
The JTPM1 header is used to connect a Trusted Platform Module (TPM)/Port 80, which
is available from a third-party vendor. A TPM/Port 80 connector is a security device
that supports encryption and authentication in hard drives. It allows the motherboard
to deny access if the TPM associated with the hard drive is not installed in the system.
See the table below for pin definitions.
1. TPM/Port 80 Header
1
TPM/Port 80 Header
Pin Definitions
Pin #
Definition
Pin #
Definition
1
+3.3V
2
SPI_CS#
3
RESET#
4
SPI_MISO
5
SPI_CLK
6
GND
7
SPI_MOSI
8
9
+3.3V Stdby
10
SPI_IRQ
Summary of Contents for X11DPU-X
Page 1: ...USER S MANUAL Revision 1 0a X11DPU X X11DPU XLL...
Page 8: ...8...