Chapter 4: BIOS
91
MCP0 (IIO PCIe Br4)
This feature configures the PCI-E Bifuraction setting for a PCI-E port specified by the user.
The options are x16 and
Auto
.
MCP1 (IIO PCIe Br5)
This feature configures the PCI-E Bifuraction setting for a PCI-E port specified by the user.
The options are x16 and
Auto
.
CPU1 PCI-E Br0D00F0 - Port 0/DMI (Available for CPU 1 Configuration
only)
Link Speed
This feature configures the link speed of a PCI-E port specified by the user. The options
are
Auto
, Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3
(Generation 3) (8 GT/s)
The following information will be displayed as well:
•
PCI-E Port Link Status
•
PCI-E Port Link Max
•
PCI-E Port Link Speed
PCI-E Port Clocking (Available for CPU 1 Configuration only)
Use this feature to configure port overclocking settings between the port specified above
and downstream components. The options are Distinct and
Common
.
PCI-E Port Max (Maximum) Payload Size (Available for CPU 1 Configuration only)
Select Auto for the system BIOS to automatically set the maximum payload value for a
PCI-E device specified by to user to enhance system performance. The options are
Auto
,
128B, and 256B.
IOAT Configuration
Disable TPH (TLP Processing Hint)
TPH is used for data-tagging with a destination ID and a few important attributes. It can
send critical data to a particular cache without writing through to memory. Select No in this
item for TLP Processing Hint support, which will allow a "TPL request" to provide "hints"
to help optimize the processing of each transaction occurred in the target memory space.
The options are Yes and
No
.
Prioritize TPH (TLP Processing Hint)
Select Yes to prioritize the TPL requests that will allow the "hints" to be sent to help facilitate
and optimize the processing of certain transactions in the system memory. The options are
Enable and
Disable
.
