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Chapter 2: Installation
Power Button
UID LED
NIC1 Active LED
Reset Button
HDD LED
PWR LED
Reset
PWR
3.3V Stby
3.3V Stby
Ground
19
X
Ground
X
3.3V Stby
20
1
2
Ground
Power Fail LED
NIC2 Active LED
NMI
3.3V
3.3V
OH/Fan Fail LED
Power LED
The Power LED connection is located on pins 15 and 16 of JF1. Refer to the table below
for pin definitions.
Power LED
Pin Definitions (JF1)
Pins
Definition
15
3.3V
16
PWR LED
NMI Button
The non-maskable interrupt (NMI) button header is located on pins 19 and 20 of JF1. Refer
to the table below for pin definitions.
NMI Button
Pin Definitions (JF1)
Pins
Definition
19
Control
20
Ground
1. PWR LED
2. NMI
1
2
IPMI CODE
+
BIOS LICENSE
MAC CODE
X11DPH-i
REV: 1.01
BAR CODE
LEDM1
JUIDB1
JHSSI
JPWR4
JPWR2
JPWR1
JSD1
JSD2
JSDCARD1
SATA2
SATA1
MH4
MH11
T-SGPIO1
JNCSI
JRK1
JTPM1
JPWR3
JPI2C1
JF1
JD1
JVRM2
JVRM1
JL1
JSTBY1
BT1
JPG1
JPL1
JPME2
JWD1
JIPMB1
LE1
LE4
LE3
JBT1
FAN6
FAN5
FANB FANA
FAN4 FAN3
FAN2
FAN1
JHFI1
AST2500
LAN
CTRL
Intel
PCH
LE2
P2-DIMMF1
P2-DIMME1
P2-DIMMD1
P2-DIMMD2
P1-DIMMC1
P1-DIMMB1
P1-DIMMA1
P1-DIMMA2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB1
P2-DIMMC1
P1-DIMMD2
P1-DIMMD1
P1-DIMME1
P1-DIMMF1
Battery
BMC
JPME1
BIOS
M.2-C2
M.2-C1
CPU1-HSSI GPIO
USB 4/5(3.0)
USB 6 (3.0)
S-SA
TA1
S-SA
TA0
I-SA
TA
4~7
I-SA
TA
0~3
CPU1 SLOT1 PCI-E 3.0 x8
CPU2 SLOT2 PCI-E 3.0 x16
CPU1 SLOT3 PCI-E 3.0 x8
CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT5 PCI-E 3.0 x16
CPU1 SLOT6 PCI-E 3.0 x8
CPU1 SLOT7 PCI-E 3.0 x8
VGA
CPU2
CPU1
LAN2
LAN1
USB 2/3(3.0)
USB 0/1(3.0)
IPMI_LAN
COM1
JP4
