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Chapter 3: Maintenance and Component Installation
Symmetric Population
2-1-1
(For Channel Configuration: 2-1-1)
Modes
CPU1
P1-
DIMMF1
P1-
DIMMF2
P1-
DIMME1
P1-
DIMME2
P1-
DIMMD1
P1-
DIMMD2
P1-
DIMMA2
P1-
DIMMA1
P1-
DIMMB2
P1-
DIMMB1
P1-
DIMMC2
P1-
DIMMC1
AD
DRAM1
-
DRAM1
-
DRAM1
DCPMM
DCPMM
DRAM1
-
DRAM1
-
DRAM1
MM
DRAM2
-
DRAM2
-
DRAM2
DCPMM
DCPMM
DRAM2
-
DRAM2
-
DRAM2
AD + MM
DRAM3
-
DRAM3
-
DRAM3
DCPMM
DCPMM
DRAM3
-
DRAM3
-
DRAM3
CPU2
P2-
DIMMF1
P2-
DIMMF2
P2-
DIMME1
P2-
DIMME2
P2-
DIMMD1
P2-
DIMMD2
P2-
DIMMA2
P2-
DIMMA1
P2-
DIMMB2
P2-
DIMMB1
P2-
DIMMC2
P2-
DIMMC1
AD
DRAM1
-
DRAM1
-
DRAM1
DCPMM
DCPMM
DRAM1
-
DRAM1
-
DRAM1
MM
DRAM2
-
DRAM2
-
DRAM2
DCPMM
DCPMM
DRAM2
-
DRAM2
-
DRAM2
AD + MM
DRAM3
-
DRAM3
-
DRAM3
DCPMM
DCPMM
DRAM3
-
DRAM3
-
DRAM3
CPU3
P3-
DIMMF1
P3-
DIMMF2
P3-
DIMME1
P3-
DIMME2
P3-
DIMMD1
P3-
DIMMD2
P3-
DIMMA2
P3-
DIMMA1
P3-
DIMMB2
P3-
DIMMB1
P3-
DIMMC2
P3-
DIMMC1
AD
DRAM1
-
DRAM1
-
DRAM1
DCPMM
DCPMM
DRAM1
-
DRAM1
-
DRAM1
MM
DRAM2
-
DRAM2
-
DRAM2
DCPMM
DCPMM
DRAM2
-
DRAM2
-
DRAM2
AD + MM
DRAM3
-
DRAM3
-
DRAM3
DCPMM
DCPMM
DRAM3
-
DRAM3
-
DRAM3
CPU4
P4-
DIMMF1
P4-
DIMMF2
P4-
DIMME1
P4-
DIMME2
P4-
DIMMD1
P4-
DIMMD2
P4-
DIMMA2
P4-
DIMMA1
P4-
DIMMB2
P4-
DIMMB1
P4-
DIMMC2
P4-
DIMMC1
AD
DRAM1
-
DRAM1
-
DRAM1
DCPMM
DCPMM
DRAM1
-
DRAM1
-
DRAM1
MM
DRAM2
-
DRAM2
-
DRAM2
DCPMM
DCPMM
DRAM2
-
DRAM2
-
DRAM2
AD + MM
DRAM3
-
DRAM3
-
DRAM3
DCPMM
DCPMM
DRAM3
-
DRAM3
-
DRAM3
Symmetric Population
2-2-1
(For Channel Configuration: 2-2-1)
Modes
CPU1
P1-
DIMMF1
P1-
DIMMF2
P1-
DIMME1
P1-
DIMME2
P1-
DIMMD1
P1-
DIMMD2
P1-
DIMMA2
P1-
DIMMA1
P1-
DIMMB2
P1-
DIMMB1
P1-
DIMMC2
P1-
DIMMC1
AD
DRAM1
-
DRAM1
DCPMM
DRAM1
DCPMM
DCPMM
DRAM1
DCPMM
DRAM1
-
DRAM1
MM
DRAM1
-
DRAM1
DCPMM
DRAM1
DCPMM
DCPMM
DRAM1
DCPMM
DRAM1
-
DRAM1
AD + MM
DRAM3
-
DRAM3
DCPMM
DRAM3
DCPMM
DCPMM
DRAM3
DCPMM
DRAM3
-
DRAM3
AD
DCPMM
-
DRAM1
DRAM1
DRAM1
DRAM1
DRAM1
DRAM1
DRAM1
DRAM1
-
DCPMM
2-2-1
CPU2
P2-
DIMMF1
P2-
DIMMF2
P2-
DIMME1
P2-
DIMME2
P2-DIM-
MD1
P2-DIM-
MD2
P2-DIM-
MA2
P2-DIM-
MA1
P2-
DIMMB2
P2-
DIMMB1
P2-
DIMMC2
P2-
DIMMC1
AD
DRAM1
-
DRAM1
DCPMM
DRAM1
DCPMM
DCPMM
DRAM1
DCPMM
DRAM1
-
DRAM1
MM
DRAM1
-
DRAM1
DCPMM
DRAM1
DCPMM
DCPMM
DRAM1
DCPMM
DRAM1
-
DRAM1
AD + MM
DRAM3
-
DRAM3
DCPMM
DRAM3
DCPMM
DCPMM
DRAM3
DCPMM
DRAM3
-
DRAM3
AD
DCPMM
-
DRAM1
DRAM1
DRAM1
DRAM1
DRAM1
DRAM1
DRAM1
DRAM1
-
DCPMM
2-2-1
CPU3
P3-
DIMMF1
P3-
DIMMF2
P3-
DIMME1
P3-
DIMME2
P3-DIM-
MD1
P3-DIM-
MD2
P3-DIM-
MA2
P3-DIM-
MA1
P3-
DIMMB2
P3-
DIMMB1
P3-
DIMMC2
P3-
DIMMC1
AD
DRAM1
-
DRAM1
DCPMM
DRAM1
DCPMM
DCPMM
DRAM1
DCPMM
DRAM1
-
DRAM1
MM
DRAM1
-
DRAM1
DCPMM
DRAM1
DCPMM
DCPMM
DRAM1
DCPMM
DRAM1
-
DRAM1
AD + MM
DRAM3
-
DRAM3
DCPMM
DRAM3
DCPMM
DCPMM
DRAM3
DCPMM
DRAM3
-
DRAM3
AD
DCPMM
-
DRAM1
DRAM1
DRAM1
DRAM1
DRAM1
DRAM1
DRAM1
DRAM1
-
DCPMM
2-2-1
CPU4
P4-
DIMMF1
P4-
DIMMF2
P4-
DIMME1
P4-
DIMME2
P4-DIM-
MD1
P4-DIM-
MD2
P4-DIM-
MA2
P4-DIM-
MA1
P4-
DIMMB2
P4-
DIMMB1
P4-
DIMMC2
P4-
DIMMC1
AD
DRAM1
-
DRAM1
DCPMM
DRAM1
DCPMM
DCPMM
DRAM1
DCPMM
DRAM1
-
DRAM1
MM
DRAM1
-
DRAM1
DCPMM
DRAM1
DCPMM
DCPMM
DRAM1
DCPMM
DRAM1
-
DRAM1
AD + MM
DRAM3
-
DRAM3
DCPMM
DRAM3
DCPMM
DCPMM
DRAM3
DCPMM
DRAM3
-
DRAM3
AD
DCPMM
-
DRAM1
DRAM1
DRAM1
DRAM1
DRAM1
DRAM1
DRAM1
DRAM1
-
DCPMM
2-2-1