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Chapter 4: Motherboard Connections
SGPIO Headers
There are two Serial Link General Purpose Input/Output (I-SGPIO1, I-SGPIO2) headers
located on the motherboard. The SGPIO headers are used to communicate with the enclosure
management chip on the back panel.
SGPIO Header
Pin Definitions
Pin#
Definition
Pin#
Definition
1
NC
2
NC
3
GND
4
DATA Out
5
Load
6
GND
7
Clock
8
NC
NC = No Connection
I-SGPIO 1/2
I-SGPIO1
I-SATA 3.0 Ports 0-3
I-SGPIO2
I-SATA 3.0 Ports 4-5
Speaker Header
JD1 is used to connect an extra speaker. By default, pins 3-4 are closed with a cap to enable
the onboard buzzer at SP1. To use an extra speaker instead, connect the speaker connector
to pins 1-4. Refer to the table below for pin definitions.
Speaker/Onboard Buzzer Header
Pin Definitions
Pin#
Signal
1
P5V
2
Key
3
R_SPKPIN_N
4
R_SPKPIN
Onboard Buzzer
The Onboard Buzzer located at SP1 is used to provide audible indicators for various beep
codes. By default, pins 3-4 of JD1 are closed with a cap, which enables the use of this buzzer.
Refer to the table below for pin definitions.
Onboard Buzzer
Pin Definitions
Pin#
Definition
1
Pos (+)
VCC
2
Neg (-)
Beep In
