Chapter 1: Introduction
1-9
1-2 Chipset and Processor Features Overview
Built upon the functionality and the capability of the Intel 5100 chipset, the
X7DCA-L motherboard provides the performance and feature set required for dual
processor-based high-end computer systems with configuration options optimized
for intensive computing, high energy-efficiency and complex business applications.
The 5100 chipset supports single or dual Intel Xeon 64-bit Quad-Core/Dual-Core
5400/5300/5200/5100 Series processors with front side bus speeds of up to 1.333
GHz. The chipset consists of the 5100 Memory Controller Hub (MCH), Intel I/O
Controller Hub (ICH9R) and the I/O subsystem.
The 5100 Memory Controller Hub (MCH)
The Intel 5100 MCH chip is designed for symmetric multiprocessing across two
independent front side bus interfaces. Each front side bus uses a 64-bit wide,
1066/1333 MTS data bus capable of transferring data at 8.5/10.6 GB/s for a total
bandwidth of 17/21.3 GB/s. The MCH supports a 36-bit wide address bus and up
to six DDR2 667 MHz/533 MHz DIMM modules, providing a total memory capacity
of up to 48 GB.
The 5100 MCH also provides six x4 PCI-Express interfaces and one x4 DMI
Interface to the ICH9R. Each PCI Express port on the MCH provides 4 GB/s bi-
directional bandwidth if configured as a x8 port, or 2 GB/s bi-directional bandwidth
if configured as a x4 port.
The Ninth Generation I/O Controller Hub (ICH9)
The I/O Controller ICH9R provides the data buffering and interface arbitration re-
quired for the system to operate efficiently. It also provides the bandwidth needed
for the system to maintain its peak performance. The Direct Media Interface (DMI)
provides the connection between the MCH and the ICH9R. The ICH9R supports
up to six PCI-Express x1 slots, six Serial ATA ports and eight USB 2.0 ports. In
addition, the ICH9R offers the Intel Matrix Storage Technology which provides vari-
ous RAID options for data protection and rapid data access. It also supports the
next generation of client management through the use of PROActive technology in
conjunction with Intel's next generation Gigabit Ethernet controllers.
The Xeon Quad-Core/Dual-Core 5400/5300/5200/5100
Series Processor Features
In addition, the Intel Xeon Quad-Core/Dual-Core 5400/5300/5200/5100 Series
Processor-based platforms offer a wide range of RAS (Reliability, Availability, and
Serviceability) features, including memory interface ECC, x4 Single Device Data
Correction, parity protection, and out-of-band register access via SMbus.
