4-10
X10DRU-i+ Motherboard User’s Manual
Chipset Configuration
North Bridge
This feature allows the user to configure the following North Bridge settings.
IIO Configuration
EV DFX (Device Function On-Hide) Feature
When this feature is set to Enable, the EV_DFX Lock Bits that are located on a
processor will always remain clear during electric tuning. The options are
Dis-
able
and Enable.
IIO1 Configuration
IOU2 (II0 PCIe Port 1)
This item configures the PCI-E port Bifuraction setting for a PCI-E port specified
by the user. The options are x4x4, X8, and
Auto
.
II01 PORT 1A Link Speed
This item configures the link speed of a PCI-E port specified by the user. The
options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s),
and
Gen 3 (Generation 3) (8 GT/s)
.
II01 Port 1B Link Speed
Use this item to configure the link speed of a PCI-E port specified by the user.
The options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s),
and
Gen 3 (Generation 3) (8 GT/s)
.
IOU0 (II0 PCIe Port 2)
This item configures the PCI-E port Bifuraction setting for a PCI-E port specified
by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and
Auto
.
AOC-UR-i4G Slot1 Link Speed
Use this item to configure the link speed of a PCI-E port specified by the user.
The options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s),
and
Gen 3 (Generation 3) (8 GT/s)
.
II01 PORT 2C Link Speed
Use this item to configure the link speed of a PCI-E port specified by the user.
The options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s),
and
Gen 3 (Generation 3) (8 GT/s)
.
