B-1
Appendix B: AMI BIOS POST Diagnostics Error Messages
Appendix B
AMI BIOS POST Diagnostic Error
M e s s a g e s
This section describes the power-on self-tests (POST) port 80
codes for the AMI BIOS.
Check
Point
Description
03
NMI is Disabled. Next, checking for a soft reset or a
power-on condition.
05
The BIOS stack has been built. Next, disabling cache
memory.
06
Uncompressing the post code unit next.
07
Next, initializing the CPU init and the CPU data area.
08
The CMOS checksum calculation is done next.
OB
Next, performing any required initialization before
keyboard BAT command is issued.
0C
The keyboard controller I/B is free. Next, issuing the
BAT command to the keyboard controller.
0E
The keyboard controller BAT command result has been
verified. Next, performing any necessary initialization
after the keyboard controller BAT command test.
0F
The initialization after the keyboard controller BAT
command test is done. The keyboard command byte is
written next.
10
The keyboard controller command byte is written.
Next, issuing the pin 23 and 24 blocking and unblocking
commands.
Summary of Contents for 440LX
Page 1: ... SUPER 440LX Chipset AMI BIOS REFERENCE MANUAL Revision 1 1 ...
Page 5: ...PRINTED IN U S A ...
Page 35: ...BIOS User s Manual A 4 ...
Page 45: ...BIOS User s Manual B 10 ...