Supermicro 4048B-TR4FT, User Manual

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7-15
Chapter 7: BIOS
Perbit (Per-bit) Deskew Training
Select Enable for Perbit Deskew Training support, which will allow the memory
controller to include various adjustable delay circuits in both Read and Write
paths on a per-bit base for effective memory interface to maximize memory
performance. The options are
Disable and Enable.
ODT Timing Mode
Use this feature to set the ODT (On-Die Termination) Timing mode for the
memory controller to enhance memory performance. The options are
Aggres-
sive Timing and Conservative Timing.
MxB Rank Sharing Mapping
Use this feature to select the address-mapping setting for memory-rank sharing
to enhance extended multimedia platform performance. he options are
Maximum
Performance and Maximum Margin.
LRDIMM (Load-Reduction DIMM) Module Delay
When this item is set to Disabled, the MRC (Memory Regulator Controller) will
not use SPD bytes 90-95 for module delay on LRDIMM memory. The options
are
Disabled and Auto.
Data Scrambling
Select Enabled to enable data scrambling to enhance system performance and
data integrity. The options are Disabled and
Enabled .
VMSE Lockstep Mode
Select Enabled to support the VMSE Lockstep mode, which will support Lock
step mode for the Intel Scalable Memory Interconnect 2 (Intel SMI 2) controller.
The options are
2:1 Mode and 1:1 Mode.
HA (Hash Mode) Early Write Post Mode
Select Enable to support memory hash-method-comparison mode when the
system is running at the early stage of POST (Power-On-Self-Test). The options
are is
Enable and Disable.
Command 2 Data Tuning
Select Enabled to fine-tune electrical command paths from the host system to
the memory-extension buffer (MXB). The options are Enabled and Disabled.