Version 1.0
Page 14 of 44
SMT370v2 User Manual
ADC Performance.
Description
Specification
Analogue inputs
Maximum voltage
1.1 Volts peak-to-peak (AC coupling)
2.2 Volts peak-to-peak (DC coupling)
Impedance
50
Ω
Bandwidth
0-250 MHz - (No anti-aliasing filter)
External Clock
Minimum voltage
0.2 Volt peak to peak minimum
Impedance
50
Ω
Frequency range
30-105 MHz – low jitter
External Trigger
Frequency Range
30-105 MHz
Signal format
LVTTL (3.3 Volts) format – connected to
3.3V FPGA – Clamp diodes to 3.3V and
Ground.
Characteristics
Resolution 14
bits
Output format
Binary or two’s complement
Maximum sampling frequency
105 MHz
SFDR
Up to 81dB.
SNR
Up to 60dB.
Figure 4 - ADC Performance.