STMicroelectronics STM32L476G-EVAL User Manual Download Page 85

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Figure 44. Quad-SPI Flash memory device schematic diagram

QSPI

MB1144

B-02

6/24/2015

Title:

Size:

Reference:

Date:

Sheet:

Revision:

STM32L476G-EVAL

Project:

VDD

Quad SPI Memory

QSPI_D0

QSPI_D3

QSPI_D2

QSPI_D1

GND

PB1

PB0

PA7

PA6

QSPI_CLK

PB10

QSPI_CS

R71

VDD

R74
10K

PB11

C44
100nF

GND

MICRON

Operating range: 2.7<VDD<3.6V

HOLD#/DQ3

VCC

DQ1

DQ0

Vss

W#/Vpp/DQ2

HOLD#/DQ3

VCC

DQ1

DQ0

Vss

W#/Vpp/DQ2

N25Q256A13EF840E

Summary of Contents for STM32L476G-EVAL

Page 1: ...ller FMC JTAG debug port STM32L476G EVAL shown in Figure 1 1 can be used as reference design for user application development although it is not considered as final application A full range of hardwar...

Page 2: ...with powering through CN22 power jack 16 2 4 Clock references 19 2 5 Reset sources 19 2 6 Boot 20 2 6 1 Boot options 20 2 6 2 Bootloader limitations 21 2 7 Audio 21 2 7 1 Digital microphones 22 2 7 2...

Page 3: ...hterboard 32 2 15 1 Limitations 37 2 16 TFT LCD panel 39 2 17 User LEDs 40 2 18 Physical input devices 40 2 18 1 Limitations 41 2 19 Operational amplifier and comparator 41 2 19 1 Operational amplifie...

Page 4: ...iple logic part 56 2 30 3 IDD measurement in dynamic run mode 58 2 30 4 Calibration procedure 58 3 Connectors 60 3 1 RS 232 D sub male connector CN9 60 3 2 Power connector CN22 60 3 3 LCD daughterboar...

Page 5: ...s Commission FCC and Industry Canada IC Compliance Statements 98 B 1 FCC Compliance Statement 98 B 1 1 Part 15 19 98 B 1 2 Part 15 105 98 B 1 3 Part 15 21 98 B 2 IC Compliance Statement 98 B 2 1 Compl...

Page 6: ...rt assignment for control of LED indicators 40 Table 22 Port assignment for control of physical input devices 40 Table 23 Setting of jumpers related with potentiometer and LDR 41 Table 24 SRAM chip se...

Page 7: ...r CN17 front view 65 Figure 23 JTAG debugging connector CN15 top view 66 Figure 24 Trace debugging connector CN12 top view 67 Figure 25 microSD card connector CN18 68 Figure 26 Analog input output con...

Page 8: ...ic diagram 91 Figure 51 Audio codec device schematic diagram 92 Figure 52 STPMS2L and PT100 schematic diagram 93 Figure 53 RF EEPROM and EEPROM schematic diagram 94 Figure 54 Motor control connector s...

Page 9: ...ing IrDA transceiver USB OTG FS Micro AB port CAN 2 0A B compliant port joystick with four way controller and selector reset and wake up tamper buttons touch sensing button light dependent resistor LD...

Page 10: ...code To order the evaluation board based on the STM32L476ZGT6 MCU use the order code STM32L476G EVAL 1 4 Unpacking recommendations Before the first use make sure that no damage occurred to the board d...

Page 11: ...FHLYHU U WUDQVFHLYHU 56 FRQQHFWRU 6 XGLR FRGHF 67 1 9 6WDQGDUG 86 FRQQHFWRU 7 WUDFH DQG 6 FRQQHFWRUV WHQVLRQ FRQQHFWRUV IRU 3 2V WZR VWHUHR KHDGSKRQH RXWSXWV 670 7 1 WUDQVFHLYHU DQG FRQQHFWRU 1 0RWRU...

Page 12: ...QH 1 HDGSKRQHV MDFN 1 HDGSKRQHV MDFN 6WDQGDUG 86 SRUW RI 67 1 9 1 7 1 7UDFH 1 1 JODVV PRGXOH GDXJKWHUERDUG 1 86 57 5 5 1 5 3520 1 0RWRU FRQWURO 76 7RXFK VHQVLQJ EXWWRQ 1 86 27 SRUW 8 670 7 1 6LJPD GHO...

Page 13: ...and used for debugging or flashing STM32L476ZGT6 Section 2 3 provides more detail on powering STM32L476G EVAL For full detail on both versions of the debug and flashing tool the stand alone ST LINK V2...

Page 14: ...race outputs through hardware modifications described in Table 1 results in reducing the memory address bus width to 19 address lines and so the addressable space to 512 Kwords of 16 bits As a consequ...

Page 15: ...s between 1 71 V and 3 6 V 2 3 1 Supplying the board through ST LINK V2 1 USB port To power STM32L476G EVAL in this way the USB host a PC gets connected with the STM32L476G EVAL board s Standard B USB...

Page 16: ...USB connector CN17 In case the board demands more than 300 mA and the host PC is connected via USB before the board is powered from CN22 there is a risk of the following events to occur in the order o...

Page 17: ...ing STM32L476G EVAL is supplied through CN17 Standard B USB connector CN6 extension connector does not pass the 5 V of STM32L476G EVAL to daughterboard Check JP18 setting in Table 2 JP17 STM32L476G EV...

Page 18: ...TM32L476ZGT6 is connected with VDD_MCU JP1 VDD_USB is connected to 3 3V JP3 VDD_IO connection JP3 Default setting VDD_IO VDDIO2 terminals of STM32L476ZGT6 is connected with VDD_MCU JP3 VDD_IO is open...

Page 19: ...e removed for X1 quartz circuit not to disturb clock reference or source on daughterboard SB33 Open Default setting PC15 OSC32_OUT terminal is not routed to extension connector CN7 X1 is used as clock...

Page 20: ...tion overruled by DSR line of RS 232 connector CN9 as shown in Table 6 This can be used to force the execution of bootloader and start user Flash memory flashing process ISP from RS 232 interface The...

Page 21: ...digit of the year and WW is the week For example a part manufactured in week 23 of 2015 bares the date code 5 23 Bootloader ID of the bootloader V 9 0 is 0x90 The following limitations exist in the bo...

Page 22: ...e STM32L476ZGT6 sends up to two independent stereo audio channels via its SAI1 TDM port to the WM8994 codec device The codec device converts the digital audio stream to stereo analog signals It then b...

Page 23: ...to STM32L476ZGT6 the LCD glass module cannot be driven 2 8 USB OTG FS port The STM32L476G EVAL board supports USB OTG full speed FS communication The USB OTG connector CN1 is of Micro AB type 2 8 1 ST...

Page 24: ...th NFC touch sensing and LCD glass module resources PC6 used as USB power switch control USBOTG_PPWR signal it is shared with touch sensing LCD glass module and motor control Configuration elements re...

Page 25: ...jumper must be closed R36 In Default setting PC6 is shunted to control the U1 power switch transiting through the LCD glass module daughterboard connector LCD glass module daughterboard should be in...

Page 26: ...2 and IrDA related operating supply voltage of STM32L476ZGT6 VDD line must be within the range from 1 71 V to 3 6 V 2 10 LPUART port On top of USART1 port for serial communication the STM32L476ZGT6 of...

Page 27: ...itch is routed to the PA8 GPIO port For microSD card operation the LCD glass module daughterboard must be plugged into CN11 and CN14 in I O bridge position as explained in Section 2 15 2 11 1 Limitati...

Page 28: ...ction Board modifications for enabling motor control 1 Emergency Stop PC9 TIM8_BKIN2 Close SB29 Remove MB979 daughterboard 2 GND GND 3 PWM_1H PC6 TIM8_CH1 Close SB27 Open SB2 Remove MB979 daughterboar...

Page 29: ...se SB17 Remove MB979 daughterboard 25 5V 5V 26 Heatsink Temp PA3 ADC12_IN Close SB22 Remove MB979 daughterboard 27 PFC Sync PF9 TIM15_CH1 Close SB25 Remove R90 28 3 3V 3 3V 29 PFC PWM PF10 TIM15_CH2 C...

Page 30: ...Hardware layout and configuration UM1855 30 100 DocID027351 Rev 3 Figure 7 PCB top side rework for motor control...

Page 31: ...and the use of sigma delta modulators 2 13 CAN The STM32L476G EVAL board supports one CAN2 0A B channel compliant with CAN specification The CN5 9 pole male connector of DE 9M type is available as CA...

Page 32: ...PH0 OSC_IN PH1 OSC_OUT Each header has two rows of 20 pins with 1 27 mm pitch and 2 54 mm row spacing For extension modules SAMTEC RSM 120 02 L D xxx and SMS 120 x x D can be recommended as SMD and t...

Page 33: ...Figure 9 shows how the LCD glass module daughterboard must be positioned for display function This position is designated in the document as display position Figure 10 shows how the LCD glass module...

Page 34: ...not routed to motor control SEG3 R68 In PA6 routed to LCDSEG3 SB21 Open PA6 not routed to Quad SPI Flash memory device SB20 Open PA6 not routed to motor control SEG4 R66 In PA7 routed to LCDSEG4 SB18...

Page 35: ...PI Flash memory device SEG13 R38 In PB13 routed to LCDSEG13 SB6 Open PB13 not routed to Touch sensing SEG18 R97 In PC0 routed to LCDSEG18 SB34 Open PC0 not routed to motor control SEG19 R98 In PC1 rou...

Page 36: ...P5 7C 7M P6 1C COM7 5J 5N 5E 6J 6N 6E 7J 7N 7E 1J Table 16 LCD glass element mapping segments 10 to 19 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 COM0 1D C1 2D Q1 C4 3D Q2 A 4D COM1 1...

Page 37: ...EG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 COM0 10e 11e 12e 13e 14e 15e 16e 17e 18e 19e COM1 10f 11f 12f 13f 14f 15f 16f 17f 18f 19f COM2 10c 11c 12c 13c 14c 15c 16c 17c 18c 19c COM3 1...

Page 38: ...00 DocID027351 Rev 3 Figure 11 LCD glass display element mapping 0 1 3 3 4 0 1 3 3 4 6 6 6 6 6 6 2 2 2 2 3 3 4 3 3 4 3 3 4 3 3 4 67 D E F G H I J K L M D E F G H I J K L M D D D D D D D D D D D D D D...

Page 39: ...ress lines A0 and A1 determine the panel resources addressed as depicted in Table 19 Table 20 gives the CN19 extension connector terminal assignment Table 19 Access to TFT LCD resources with FMC addre...

Page 40: ...V3 light dependent resistor LDR R52 Table 22 shows the assignment of ports routed to the physical input devices They are either ports of the STM32L476ZGT6 or of one of the two I O expander ICs on the...

Page 41: ...lifier STM32L476ZGT6 provides two on board operational amplifiers one of which OpAmp1 is made accessible on STM32L476G EVAL OpAmp1 has its inputs and its output routed to I O ports PA0 PA1 and PA3 res...

Page 42: ...des on board analog to digital converter ADC and digital to analog converter DAC The port PA4 can be configured to operate either as ADC input or as DAC output PA4 is routed to the two way header CN8...

Page 43: ...ed on the STM32L476G EVAL main board in U5 position The STM32L476G EVAL main board as well as the addressing capabilities of FMC allow hosting M29W256GL70ZA6E a 256 Mbit NOR Flash memory device This i...

Page 44: ...o 1 MHz The base I C bus address is 0xA0 Write protecting the EEPROM is possible through opening the SB7 solder bridge By default SB7 is closed and writing into the EEPROM enabled 2 23 1 Operating vol...

Page 45: ...on Table 26 Configuration elements related with Quad SPI device Element Setting Configuration SB12 SB13 MB979 SB12 open SB13 open Default setting QSPI_D0 data line is not available at Quad SPI Flash m...

Page 46: ...uch sensing performance by isolating copper tracks to avoid disturbances due to their antenna effect SB21 SB20 MB979 SB21 open SB20 open Default setting QSPI_D3 data line is not available at Quad SPI...

Page 47: ...tor for LCD glass module daughterboard This setting is not good for robustness of touch sensing Out PC6 port is cut from CN14 This setting is good for robustness of touch sensing SB2 Open Default sett...

Page 48: ...related with smartcard operation Refer to Table 8 Table 12 Table 26 andTable 27 for complementary information Bridging of CN11 and CN14 rows of I Os can be done by means of the MB979 daughterboard pl...

Page 49: ...B14 SB15 R62 in SB14 open SB15 open CN11 I O bridged Default setting Smartcard controller U30 is supplied with clock PB0 port is routed to XTAL1 of U30 as SmartCard_CLK line and it is not routed to ot...

Page 50: ...utton motor control and USB OTG FS port operation if the last operates as USB host SWP can operate concurrently with USB OTG FS port acting as USB device 2 27 2 Operating voltage Smartcard operating r...

Page 51: ...outputs converted measurement data on the DFSDM_DATIN1 line received by the STM32L476ZGT6 DFSDM controller The data from STPMS2L are synchronized with DFSDM_CKOUT clock generated by the STM32L476ZGT6...

Page 52: ...mV current channel range differential voltage 300mV internal voltage reference is used input bandwidth 0 to 1 kHz temperature compensation flattest 30ppm C DAT output voltage and current samples multi...

Page 53: ...between 200 mV and 300 mV and the frequency adjustable between 10 Hz and 100 Hz With 34 Hz frequency and the load formed of R27 of 1 k in parallel with C29 of 4 7 F the voltage and current phases are...

Page 54: ...tor representing the current flowing through PT100 The other channel measures the voltage across PT100 Figure 16 Temperature measurement principle schematic diagram With voltage across and current thr...

Page 55: ...nt consumption in dynamic run mode the latter in low power mode The differential amplifier uses three stages U15B U15C U15D of quadruple operational amplifier device U15 TSZ124 The gain is set to 50 s...

Page 56: ...ow power mode current consumption is started and end by the microcontroller in its dynamic run mode As between the start and end event the microcontroller must transit through one of its low power mod...

Page 57: ...the voltage on the sampling capacitor C73 to stabilize Phase 3 exiting low power mode measurement and end The MCU is in low power mode The voltage across C73 capacitor is now stabilized so it represen...

Page 58: ...73 the offset at the differential amplifier output described in Section 2 30 1 The calibration procedure consists in measuring the offset voltage when the current through the shunt resistor is zero Th...

Page 59: ...mode IDD measurement as described in Section 2 30 2 The value Vmeasured obtained corresponds to the sum of MCU supply current and the differential amplifier s offset Voffset The software computes a V...

Page 60: ...powered from a DC 5V external power supply via the CN22 jack illustrated in Figure 21 The central pin of CN22 must be positive Figure 21 Power supply connector CN22 front view Table 32 RS 232 D sub D...

Page 61: ...476ZGT6 ports routed to these two connectors can be accessed on odd CN11 and CN14 pins the row of pin 1 when no daughterboard is plugged in Daughterboards plugging into CN11 and CN14 must keep the eve...

Page 62: ...188 11 GND 13 PG2 A12 Remove R18 to deselect SRAM U2 Remove R43 to deselect Flash memory U5 15 PD3 DFSDM_DATIN1 Remove R23 17 PD0 D2 Remove R18 to deselect SRAM U2 Remove R43 to deselect Flash memory...

Page 63: ...MC_NE2 Remove R43 22 GND 24 PD6 SAI1_SDA FMC_NWAIT Remove R53 open SB10 26 PF1 A1 Remove R18 to deselect SRAM U2 Remove R43 to deselect Flash memory U5 28 D5V 30 PC13 Wake up Remove R244 32 PF2 A2 Rem...

Page 64: ...MC_PFC_sync Remove R90 SB25 31 PF10 IDD_CNT_EN MC_PFC_PWM Remove R91 SB37 33 PH1 OSC_OUT Remove R95 close SB23 35 PA5 IDD_Measurement Remove R69 37 PA0 OpAmp1_INP MC_EncA Remove R83 SB35 39 GND 2 PE15...

Page 65: ...connector CN17 is used to connect the on board ST LINK V2 1 facility to PC for flashing and debugging software Figure 22 USB type B connector CN17 front view 26 GND 28 PF7 SAI1_MCKB Remove R106 30 PF...

Page 66: ...ector CN17 Terminal Description Terminal Description 1 VBUS power 4 GND 2 DM 5 6 Shield 3 DP Table 37 JATG debugging connector CN15 Terminal Function MCU port Terminal Function MCU port 1 VDD power 2...

Page 67: ...p view Table 38 Trace debugging connector CN12 Terminal Function MCU port Terminal Function MCU port 1 VDD power 2 TMS PA13 3 GND 4 TCK PA14 5 GND 6 TDO PB3 7 KEY 8 TDI PA15 9 GND 10 RESET 11 GND 12 T...

Page 68: ...CN8 Figure 26 Analog input output connector CN8 top view Table 39 microSD card connector CN18 Terminal Terminal name MCU port Terminal Terminal name MCU port 1 SDIO_D2 PC10 6 Vss GND 2 SDIO_D3 PC11 7...

Page 69: ...r CN2 Figure 28 Motor control connector CN2 top view Table 40 Analog input output connector CN8 Terminal Function MCU port Terminal Function MCU port 1 GND 2 analog input output PA4 Table 41 RF EEPROM...

Page 70: ...D 11 PWM_3H PC8 12 GND 13 PWM_3L PB1 14 PC5 BUS VOLTAGE 15 CURRENT A PC0 16 GND 17 CURRENT B PC1 18 GND 19 CURRENT C PC2 20 GND 21 ICL Shutout PG6 22 GND 23 DISSIPATIVE BRAKE PB2 24 PC4 PCD Ind Curren...

Page 71: ...iew Table 44 CAN D sub DE 9M 9 pins male connector CN5 Terminal Terminal name Terminal Terminal name 1 4 8 9 NC 7 CANH 2 CANL 3 5 6 GND 3 6 Table 45 NFC CN13 terminal assignment CN13 terminal NFC sign...

Page 72: ...4 NFC_MISO PB14 SPI data slave output 5 NFC_MOSI PB15 SPI data slave input 6 NFC_SCK PB13 SPI serial clock 7 3V3 PB6 Main power supply power supply for RF drivers 8 GND PB7 Ground Table 45 NFC CN13 t...

Page 73: ...ltage MC_EncIndex MC_PFC_IndCurr MC_Temperature MC_PFC_Shutdown MC_PFC_Vac U_MotorControl MotorControl SchDoc uSD_CLK uSD_CMD uSD_D0 uSD_D1 uSD_D2 uSD_D3 uSD_DETECT U_MicroSD MicroSD SchDoc QSPI_D0 QS...

Page 74: ...1 IDD_Measurement CODEC_INT OpAmp1_INP DMIC_DATIN PT100_DATIN USBOTG_VBUS USBOTG_ID IDD_WAKEUP OpAmp1_INM Comp2_INP TDO SWO TRACE_D1 TRACE_D2 TRACE_D3 IDD_CNT_EN TRACE_CK TRACE_D0 SmartCard_CLK OpAmp1...

Page 75: ...DCOM 0 3 TKEY TKEY_CS QSPI_D3 QSPI_D2 QSPI_D1 QSPI_D0 R68 0 R66 0 R62 0 R56 0 R82 0 R103 0 TRACE_CK R53 0 SAI1_SDA R69 0 OpAmp1_INP R39 0 R38 0 MC_PFC_Vac MC_Temperature R78 0 MC_EncB R81 0 MC_EncInde...

Page 76: ...G27 LCDCOM4 LCDCOM5 LCDCOM6 LCDSEG 18 20 LCDSEG 18 20 LCDCOM 4 6 LCDCOM 4 6 PH1 PH0 PH0 PH1 SHIELD R57 1K2 R60 1K2 R61 0 VDD SAI1_SDB SAI1_MCKB SAI1_SCKB SAI1_FSB MC_ICL_Shutout R35 0 R91 0 MC_PFC_PWM...

Page 77: ...30 LCDSEG31 LCDSEG32 LCDSEG33 LCDSEG34 LCDSEG35 LCDSEG36 LCDSEG37 LCDSEG38 LCDSEG39 LCDSEG0 LCDCOM7 LCDCOM6 LCDCOM5 LCDCOM4 FMC_NBL0 FMC_NBL1 LCDSEG 0 39 LCDSEG 0 39 LCDCOM 0 7 LCDCOM 0 7 1 2 3 4 5 6...

Page 78: ...G13 PG14 PG15 IOExpander_Y IOExpander_Y IOExpander_X IOExpander_X IOExpander_INT I2C_SCL I2C_SDA JOY_SEL JOY_DOWN JOY_LEFT JOY_RIGHT JOY_UP LED4 GPIO0 1 INT 22 A0 18 SCL 19 SDA 20 VCC 21 A2 24 GPIO7 8...

Page 79: ...D 7 VI 6 PG 3 U28 ST1L05BPUR Power Supply 3 3V Vout 1 22 1 R1 R2 C101 100nF 3V3 TP11 C38 100nF VDD_IO VDD_IO TP4 VDDA 3 2 1 JP10 VDDA TP8 3V3 VDD_USB 3 2 1 JP1 VDD_USB TP2 3V3 VDD C59 1uF C60 100nF GN...

Page 80: ...J 18 CMDVCC 19 RSTIN 20 Vdd 21 GND 22 OFF 23 XTAL1 24 XTAL2 25 I OUC 26 AUX1UC 27 AUX2UC 28 U30 ST8024CDR C136 100nF C135 100nF 5V C137 100nF C117 100nF R242 100K 3V3 R216 4K7 3V3 R218 10K R217 10K 3V...

Page 81: ...T1OUT 9 T2OUT 10 T3OUT 11 T3IN 12 T2IN 13 T1IN 14 R5OUT 15 R4OUT 16 R3OUT 17 R2OUT 18 R1OUT 19 R2OUTB 20 R1OUTB 21 nSHDN 22 nEN 23 C1 24 GND 25 VCC 26 V 27 C1 28 U10 ST3241EBPR C62 100nF C64 100nF C6...

Page 82: ...3 DQ8 F3 DQ1 H3 DQ9 G3 DQ2 E4 DQ10 F4 DQ3 H4 DQ11 G4 VCCQ F1 DQ4 H5 DQ12 F5 DQ5 E5 DQ13 G6 DQ6 H6 DQ14 F6 DQ7 E6 DQ15A 1 G7 VSS H7 BYTE F7 A16 E7 VCC G5 VSS H2 A23 C8 U5 M29W128GL70ZA6E M29W256GL70ZA6...

Page 83: ...IR 24 VCCB 18 VCCB 7 GND 4 GND 10 GND 15 GND 21 DIR 1 VCCA 42 VCCA 31 GND 45 GND 39 GND 34 GND 28 U22 SN74LVC16T245DGGR A1_BUF A1_BUF PF0 D 0 15 A 0 23 D 0 15 A0 LCD_NE3 VDD VDD R161 10K R166 10K 3V3...

Page 84: ...PH1 PH0 close to MCU D5V PA13 PA12 PA11 PG8 PG7 PG6 PD7 PG15 PB6 BOOT0 PE4 PE5 PE10 PE11 PE12 PG2 PG3 PG4 PG5 PF 0 15 PF 0 15 PG 0 15 PG 0 15 R44 0 VDD PD3 PD4 PG13 PG14 PE15 PE13 PE14 PF15 PF13 PF12...

Page 85: ...Size Reference Date Sheet of A4 Revision STM32L476G EVAL Project VDD Quad SPI Memory QSPI_D0 QSPI_D3 QSPI_D2 QSPI_D1 GND PB1 PB0 PA7 PA6 QSPI_CLK PB10 QSPI_CS R71 0 VDD R74 10K PB11 C44 100nF GND MIC...

Page 86: ...of A4 Revision STM32L476G EVAL Project MicroSD card uSD_CLK uSD_CMD uSD_D0 uSD_D1 uSD_D2 uSD_D3 R182 47K R185 47K R194 0 R176 47K R178 47K R175 47K VDD PC9 PC8 PC10 PC11 PC12 PD2 PA8 Operating Voltage...

Page 87: ...1 RIGHT 4 UP 6 B3 MT008 A JOY_SEL JOY_DOWN JOY_LEFT JOY_RIGHT JOY_UP Joystick WKUP TAMPER Button LEDs R51 8 2K PB2 C47 N A R72 0 R73 0 R245 220K 1 4 3 2 B2 WKUP VDD R244 330 KEY Close to MCU on PCB PA...

Page 88: ...of A4 Revision STM32L476G EVAL Project D 1 GND 2 VCC 3 R 4 Vref 5 CANL 6 CANH 7 RS 8 U8 SN65HVD230 3V3 VDD R55 120 JP6 Header 2X1 3 2 1 JP4 R45 10K VDD C49 100nF R46 0 R77 0 R70 N A Default setting 1...

Page 89: ...ensing MB1144 B 02 6 24 2015 Title Size Reference Date Sheet of A4 Revision STM32L476G EVAL Project Touch Sensing diameter 10mm min on active shield diameter 12mm min R40 10K SHIELD SHIELD_CS TS1 TS_P...

Page 90: ...7 Shield 8 Shield 9 EXP 10 CN1 475900001 PA9 PA10 PA11 PA12 R3 0 R4 0 Dz A2 ID A3 Pd1 B1 Pup B2 Vbus B3 D in C1 Pd2 C2 D out C3 D in D1 GND D2 D out D3 D1 EMIF02 USB03F2 1 2 LD5 Green PC6 R21 10K R8...

Page 91: ...ND 8 Ctc 9 Rtc 10 RS 11 MR 12 Q8 13 Q7 14 Q9 15 VCC 16 U14 74LV4060PW VDD VDD R127 220K R122 10K VDD VDD_MCU C77 1nF R134 15K R130 30K Oscillator frequency 30KHz VDD C72 100nF PC5 PF10 PA5 R136 3K6 0...

Page 92: ...UT1N C5 LINEOUT1P B5 LINEOUT2N C4 LINEOUT2P B4 LINEOUTFB A6 LRCLK1 E3 MCLK1 D3 MICBIAS1 A7 MICBIAS2 B6 REFGND A5 SCLK H1 SDA F3 SPKGND1 A1 SPKGND2 C1 SPKMODE A3 SPKOUTLN B1 SPKOUTLP A2 SPKOUTRN C3 SPK...

Page 93: ...and 2 R31 100 1 GND GND GND GND C25 100nF GND GND VCC 1 VDDAC 2 VDDA 3 VBG 4 DATn 16 DAT 15 CLK 14 MS3 13 MS2 12 MS1 11 MS0 10 VDDAV 9 VIP 8 VIN 7 CIP 6 CIN 5 GND 17 AV Exposed pad GND U4 STPMS2L PUR...

Page 94: ...or 5V SSM 104 L DH Samtec I2C_SCL I2C_SDA PG14 PG13 EXT_RESET E0 1 E1 2 E2 3 VSS 4 SDA 5 SCL 6 WC 7 VCC 8 U6 M24128 DFDW6TP GND PB11 PB10 R42 10K VDD C39 100nF GND GND I2C_SDA I2C_SCL I2C EEPROM M24C6...

Page 95: ...PF9 PA1 PB2 PA2 PA7 PB0 PB1 PA0 PC9 PC6 PC7 PC8 C13 N A C10 N A C16 N A C9 N A C1 N A C4 N A PF10 C8 10nF C11 100nF C17 100nF R19 100K EMERGENCY STOP 1 PWM_1H 3 PWM_1L 5 PWM_2H 7 PWM_2L 9 PWM_3H 11 P...

Page 96: ...N A R160 N A R152 N A R157 N A VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 CN15 JTAG VDD VDD R163 10K R164 10K R159 10K R1540 R162 N A R1560 R131 N A TDI RESET TRACE_D3 TRACE_D2 TRACE_D1 T...

Page 97: ...100K VccA 1 A1 2 A2 3 GND 4 DIR 5 B2 6 B1 7 VccB 8 U24 SN74LVC2T45DCUT VDD T_SWO T_SWDIO_IN T_SWDIO_IN T_SWO R177 1 5K R167 10K R171 36K R174 N A R172 10K R187 100K MCO 2 1 4 3 Red Yellow LD8 HSMF A20...

Page 98: ...the instructions may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation If this equipment does cause harmful...

Page 99: ...5 3 Figure 3 swap of FAULT and VBUS prints in the upper left corner of the board Section 2 8 3 swap of LD5 and LD6 Appendix B modified Section B 1 3 and Section B 2 text Table 13 JP6 default setting m...

Page 100: ...asers are solely responsible for the choice selection and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products No license express or implied t...

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