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Package information

STM32F042x4 STM32F042x6

DocID025832 Rev 5

Device marking

The following figure gives an example of topside marking orientation versus pin 1 identifier
location.

Other optional marking or inset/upset marks, which identify the parts throughout supply
chain operations, are not indicated below.

Figure 47. UFQFPN32 package marking example

1. Parts marked as "ES", "E" or accompanied by an Engineering Sample notification letter, are not yet

qualified and therefore not yet ready to be used in production and any consequences deriving from such

usage will not be at ST charge. In no event, ST will be liable for any customer usage of these engineering

samples in production. ST Quality has to be contacted prior to any decision to use these Engineering

Samples to run qualification activity.

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Summary of Contents for STM32F042C6

Page 1: ...channels Conversion range 0 to 3 6 V Separate analog supply 2 4 V to 3 6 V Up to 14 capacitive sensing channels for touchkey linear and rotary touch sensors Calendar RTC with alarm and periodic wakeu...

Page 2: ...ry access controller DMA 18 3 9 Interrupts and events 18 3 9 1 Nested vectored interrupt controller NVIC 18 3 9 2 Extended interrupt event controller EXTI 18 3 10 Analog to digital converter ADC 18 3...

Page 3: ...nd maximum values 42 6 1 2 Typical values 42 6 1 3 Typical curves 42 6 1 4 Loading capacitor 42 6 1 5 Pin input voltage 42 6 1 6 Power supply scheme 43 6 1 7 Current consumption measurement 44 6 2 Abs...

Page 4: ...3 19 Timer characteristics 82 6 3 20 Communication interfaces 83 7 Package information 90 7 1 LQFP48 package information 90 7 2 UFQFPN48 package information 93 7 3 WLCSP36 package information 96 7 4...

Page 5: ...itions 47 Table 22 Operating conditions at power up power down 48 Table 23 Embedded reset and power control block characteristics 48 Table 24 Programmable voltage detector characteristics 48 Table 25...

Page 6: ...timeout period at 40 kHz LSI 83 Table 61 WWDG min max timeout value at 48 MHz PCLK 83 Table 62 I2 C analog filter characteristics 84 Table 63 SPI characteristics 84 Table 64 I2 S characteristics 86 Ta...

Page 7: ...gure 23 Five volt tolerant FT and FTf I O input characteristics 74 Figure 24 I O AC characteristics definition 77 Figure 25 Recommended NRST pin protection 78 Figure 26 ADC accuracy characteristics 81...

Page 8: ...832 Rev 5 Figure 49 Recommended footprint for UFQFPN28 package 106 Figure 50 UFQFPN28 package marking example 107 Figure 51 TSSOP20 package outline 108 Figure 52 Recommended footprint for TSSOP20 pack...

Page 9: ...teristics of the STM32F042x4 x6 microcontrollers This document should be read in conjunction with the STM32F0xxxx reference manual RM0091 The reference manual is available from the STMicroelectronics...

Page 10: ...imer The STM32F042x4 x6 microcontrollers operate in the 40 to 85 C and 40 to 105 C temperature ranges from a 2 0 to 3 6 V power supply A comprehensive set of power saving modes allows the design of lo...

Page 11: ...t Comm interfaces SPI I2 S 1 1 1 2 1 I2 C 1 USART 2 CAN 1 USB 1 CEC 1 12 bit ADC number of channels 1 9 ext 3 int 1 10 ext 3 int GPIOs 16 24 26 28 30 38 Capacitive sensing channels 7 11 13 14 14 14 Ma...

Page 12: ...B 1 26 B287 7 03 5 57 50 287 9 7 7 5 DV 9 2 9 2 2 1 6 1 026 0 62 6 166 DV 9 6 6 6 6 3 9 5B287 DV FKDQQHO FRPSO 5 DV FKDQQHO FRPSO 5 DV FKDQQHO DV FK 75 DV FK 75 DV 3 0 FKDQQHOV 257 0 38 I0 0 6HULDO LU...

Page 13: ...and featuring embedded parity checking with exception generation for fail critical applications The non volatile memory is divided into two arrays 16 to 32 Kbytes of embedded Flash memory for programs...

Page 14: ...DDIO2 supply is monitored and compared with the internal reference voltage VREFINT When the VDDIO2 is below this threshold all the I Os supplied from this rail are disabled by hardware The output of t...

Page 15: ...AM and registers All clocks in the 1 8 V domain are stopped the PLL the HSI RC and the HSE crystal oscillators are disabled The voltage regulator can also be put either in normal or in low power mode...

Page 16: ...oftware interrupt is generated if enabled Similarly full interrupt management of the PLL clock entry is available when necessary for example on failure of an indirectly used external crystal resonator...

Page 17: ...ital or analog alternate functions 06Y 9 26 B 1 26 B287 26 B 1 26 B287 3 08 0 2 0DLQ FORFN RXWSXW 3 6 6 3 FRUH PHPRU 0 RUWH IUHH UXQ FORFN DV QFKURQRXV FORFN LQSXW 6 6 6 6 57 3 65 6 0 2 57 57 6 6 6 7...

Page 18: ...he 16 interrupt lines of Cortex M0 and 4 priority levels Closely coupled NVIC gives low latency interrupt processing Interrupt entry vector table address passed directly to the core Closely coupled NV...

Page 19: ...alibrated internal temperature sensor is suitable for applications that detect temperature changes only To improve the accuracy of the temperature sensor measurement each device is individually factor...

Page 20: ...acquisition principle It consists in charging the sensor capacitance and then transferring a part of the accumulated charges into a sampling capacitor until the voltage across this capacitor has reac...

Page 21: ...ber of capacitive sensing channels STM32F042Cx LQPF48 UQFPN48 STM32F042Tx WLCSP36 STM32F042Kx LQFP32 UQFPN32 STM32F042Gx UQFPN28 STM32F042Fx TSSOP20 G1 3 3 3 3 3 G2 3 3 3 3 3 G3 2 2 1 2 1 0 G4 3 3 3 1...

Page 22: ...e two synchronizable 4 channel general purpose timers TIM2 is based on a 32 bit auto reload up downcounter and a 16 bit prescaler TIM3 is based on a 16 bit auto reload up downcounter and a 16 bit pres...

Page 23: ...watchdog WWDG The system window watchdog is based on a 7 bit downcounter that can be set as free running It can be used as a watchdog to reset the device when a problem occurs It is clocked from the A...

Page 24: ...precision The RTC clock sources can be a 32 768 kHz external crystal a resonator or oscillator the internal low power RC oscillator typical frequency of 40 kHz the high speed external clock divided by...

Page 25: ...Master Slave capability and auto baud rate feature and has a clock domain independent of the CPU clock allowing to wake up the MCU from Stop mode The USART interfaces can be served by the DMA controll...

Page 26: ...ition multimedia interface HDMI consumer electronics control CEC The device embeds a HDMI CEC controller that provides hardware support for the Consumer Electronics Control CEC protocol Supplement 1 t...

Page 27: ...48 MHz clock which can be generated from the internal main PLL the clock source must use an HSE crystal oscillator or by the internal 48 MHz oscillator in automatic trimming mode The synchronization f...

Page 28: ...3 3 3 3 3 3 3 3 966 9 9 7 3 3 26 B 1 3 26 B287 3 26 B 1 3 26 B287 1567 966 9 3 3 3 9 2 966 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 227 3 3 966 9 7RS YLHZ 4 3 2 VXSSOLHG IURP 9 2 06Y 9 9 7 1567 966 9 3 3...

Page 29: ...g from bottom view in the previous document versions Figure 6 LQFP32 package pinout 06Y 9 7RS YLHZ 63 3 3 26 B 1 3 26 B 287 966 3 3 9 3 26 B 1 3 26 B 287 1567 9 3 3 3 227 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3...

Page 30: ...an be remapped in place of pin pair PA9 10 using the SYSCFG_CFGR1 register 06Y 9 SRVHG SDG 3 3 3 3 3 3 3 3 9 3 26 B 1 3 26 B287 1567 9 3 3 3 3 3 3 3 3 3 3 9 2 3 3 3 3 3 3 3 227 3 7RS YLHZ SRVHG SDG 8...

Page 31: ...rackets below the pin name the pin function during and after reset is the same as the actual pin name Pin type S Supply pin I O Input output pin I O structure FT 5 V tolerant I O FTf 5 V tolerant I O...

Page 32: ..._IN 4 C6 PC15 OSC32_OUT PC15 I O TC 1 2 OSC32_OUT 5 B5 2 2 2 2 PF0 OSC_IN PF0 I O FTf CRS_ SYNC I2C1_SDA OSC_IN 6 C5 3 3 3 3 PF1 OSC_OUT PF1 I O FTf I2C1_SCL OSC_OUT 7 D5 4 4 4 4 NRST I O RST Device r...

Page 33: ...1 TSC_G2_IO4 EVENTOUT ADC_IN7 18 F3 14 14 14 PB0 I O TTa TIM3_CH3 TIM1_CH2N TSC_G3_IO2 EVENTOUT ADC_IN8 19 F2 15 15 15 14 PB1 I O TTa TIM3_CH4 TIM14_CH1 TIM1_CH3N TSC_G3_IO3 ADC_IN9 20 D2 16 PB2 I O F...

Page 34: ...TSC_G4_IO2 I2C1_SDA 32 C2 21 21 19 5 17 5 PA11 I O FTf 4 CAN_RX USART1_CTS TIM1_CH4 TSC_G4_IO3 EVENTOUT I2C1_SCL USB_DM 33 A1 22 22 20 5 18 5 PA12 I O FTf 4 CAN_TX USART1_RTS TIM1_ETR TSC_G4_IO4 EVEN...

Page 35: ...M16_BKIN TIM3_CH2 WKUP6 42 C4 29 29 27 PB6 I O FTf I2C1_SCL USART1_TX TIM16_CH1N TSC_G5_I03 43 A4 30 30 28 PB7 I O FTf I2C1_SDA USART1_RX TIM17_CH1N TSC_G5_IO4 44 31 PF11 BOOT0 I O FT Boot memory sele...

Page 36: ...system reset For details on how to manage these GPIOs refer to the RTC domain and RTC register descriptions in the reference manual 3 Distinct VSSA pin is only available on 48 pin packages On all oth...

Page 37: ...IO1 TIM14_CH1 PA5 SPI1_SCK I2S1_CK CEC TIM2_CH1_ETR TSC_G2_IO2 PA6 SPI1_MISO I2S1_MCK TIM3_CH1 TIM1_BKIN TSC_G2_IO3 TIM16_CH1 EVENTOUT PA7 SPI1_MOSI I2S1_SD TIM3_CH2 TIM1_CH1N TSC_G2_IO4 TIM14_CH1 TIM...

Page 38: ..._IO2 TIM17_BKIN PB5 SPI1_MOSI I2S1_SD TIM3_CH2 TIM16_BKIN I2C1_SMBA PB6 USART1_TX I2C1_SCL TIM16_CH1N TSC_G5_IO3 PB7 USART1_RX I2C1_SDA TIM17_CH1N TSC_G5_IO4 PB8 CEC I2C1_SCL TIM16_CH1 TSC_SYNC CAN_RX...

Page 39: ...spaces of STM32F042x4 end at 0x0000 3FFF and 0x0800 3FFF respectively Figure 10 STM32F042x6 memory map 06Y 9 3HULSKHUDOV 65 0 ODVK PHPRU 5HVHUYHG 6 VWHP PHPRU 2SWLRQ WHV ODVK V VWHP PHPRU RU 65 0 GHSH...

Page 40: ...1 KB Flash memory interface 0x4002 1400 0x4002 1FFF 3 KB Reserved 0x4002 1000 0x4002 13FF 1 KB RCC 0x4002 0400 0x4002 0FFF 3 KB Reserved 0x4002 0000 0x4002 03FF 1 KB DMA 0x4001 8000 0x4001 FFFF 32 KB...

Page 41: ...KB Reserved 0x4000 5400 0x4000 57FF 1 KB I2C1 0x4000 4800 0x4000 53FF 3 KB Reserved 0x4000 4400 0x4000 47FF 1 KB USART2 0x4000 3C00 0x4000 43FF 2 KB Reserved 0x4000 3800 0x4000 3BFF 1 KB SPI2 0x4000 3...

Page 42: ...lues refer to sample tests and represent the mean value plus or minus three times the standard deviation mean 3 6 1 2 Typical values Unless otherwise specified typical data are based on TA 25 C VDD VD...

Page 43: ...ramic capacitors as shown above These capacitors must be placed as close as possible to or below the appropriate pins on the underside of the PCB to ensure the good functionality of the device 9 2 9 0...

Page 44: ...Electrical characteristics STM32F042x4 STM32F042x6 44 117 DocID025832 Rev 5 6 1 7 Current consumption measurement Figure 14 Current consumption measurement scheme 06 9 9 7 9 9 B9 7 9 2...

Page 45: ...ternal main supply voltage 0 3 4 0 V VDDIO2 VSS External I O supply voltage 0 3 4 0 V VDDA VSS External analog supply voltage 0 3 4 0 V VDD VDDA Allowed voltage difference for VDD VDDA 0 4 V VBAT VSS...

Page 46: ...ground VSS VSSA pins must always be connected to the external power supply in the permitted range 2 This current consumption must be correctly distributed over all I Os and control pins The total out...

Page 47: ...65 3 6 V VIN I O input voltage TC and RST I O 0 3 VDDIOx 0 3 V TTa I O 0 3 VDDA 0 3 1 FT and FTf I O 0 3 5 5 1 PD Power dissipation at TA 85 C for suffix 6 or TA 105 C for suffix 7 2 LQFP48 364 mW UF...

Page 48: ...on power down reset threshold Falling edge 2 2 The product behavior is guaranteed by design down to the minimum VPOR PDR value 1 80 1 88 1 96 3 3 Data based on characterization results not tested in...

Page 49: ...is section are performed with a reduced code that gives a consumption equivalent to CoreMark code VPVD6 PVD threshold 6 Rising edge 2 66 2 78 2 9 V Falling edge 2 56 2 68 2 8 V VPVD7 PVD threshold 7 R...

Page 50: ...ral operating conditions Table 26 Typical and maximum current consumption from VDD supply at VDD 3 6 V Symbol Parameter Conditions fHCLK All peripherals enabled 1 All peripherals disabled Unit Typ Max...

Page 51: ...on 48 MHz 12 3 15 0 3 16 0 16 2 3 2 9 3 2 3 3 3 3 4 3 32 MHz 8 5 10 6 11 2 11 7 1 9 2 1 2 2 2 5 24 MHz 6 5 8 1 8 5 8 7 1 6 1 8 1 8 1 9 HSE bypass PLL off 8 MHz 2 3 3 0 3 1 3 2 0 7 0 8 0 8 0 9 1 MHz 0...

Page 52: ...bypass PLL off 8 MHz 2 7 3 7 4 2 4 5 3 5 4 7 5 2 5 5 1 MHz 2 7 3 7 4 2 4 2 3 6 4 7 5 2 5 5 HSI clock PLL on 48 MHz 220 242 251 254 242 264 275 279 32 MHz 173 193 200 202 191 211 219 221 24 MHz 151 16...

Page 53: ...0 8 0 9 1 0 1 1 2 0 2 5 3 0 IDDA Supply current in Stop mode V DDA monitoring ON Regulator in run mode all oscillators OFF 2 0 2 1 2 2 2 4 2 5 2 7 3 5 3 5 4 5 Regulator in low power mode all oscillato...

Page 54: ...used for frequencies greater than 8 MHz AHB prescaler of 2 4 8 and 16 is used for the frequencies 4 MHz 2 MHz 1 MHz and 500 kHz respectively Table 29 Typical and maximum current consumption from the V...

Page 55: ...Os configured as inputs if an intermediate voltage level is externally applied This current consumption is caused by the input Schmitt Table 30 Typical current consumption code executing from Flash m...

Page 56: ...ther by using pull up down resistors or by configuring the pins in output mode I O dynamic current consumption In addition to the internal peripheral current consumption measured previously see Table...

Page 57: ...IOx 3 3 V CEXT 0 pF C CINT CEXT CS 4 MHz 0 18 8 MHz 0 37 16 MHz 0 76 24 MHz 1 39 48 MHz 2 188 VDDIOx 3 3 V CEXT 10 pF C CINT CEXT CS 4 MHz 0 32 8 MHz 0 64 16 MHz 1 25 24 MHz 2 23 48 MHz 4 442 VDDIOx 3...

Page 58: ...ss otherwise mentioned The given value is calculated by measuring the current consumption with all peripherals clocked off with only one peripheral clocked on Ambient operating temperature and supply...

Page 59: ...1 17 8 USART2 5 6 USB 4 9 WWDG 1 4 All APB peripherals 136 7 1 The BusMatrix is automatically active when at least one master is ON CPU DMA 2 The APB Bridge is automatically active when at least one p...

Page 60: ...rating conditions 6 3 7 External clock source characteristics High speed external user clock generated from an external source In bypass mode the HSE oscillator is switched off and the input pin is a...

Page 61: ...shown in Figure 16 Figure 16 Low speed external clock source AC timing diagram 1 Guaranteed by design not tested in production Table 35 Low speed external user clock characteristics Symbol Parameter...

Page 62: ...ation of CL1 and CL2 PCB and MCU pin capacitance must be included 10 pF can be used as a rough estimate of the combined pin and board capacitance when sizing CL1 and CL2 Note For information on select...

Page 63: ...e accuracy 06 9 26 B 1 26 B287 5 LDV FRQWUROOHG JDLQ I 6 5 7 0 UHVRQDWRU 5HVRQDWRU ZLWK LQWHJUDWHG FDSDFLWRUV Table 37 LSE oscillator characteristics fLSE 32 768 kHz Symbol Parameter Conditions 1 Min...

Page 64: ...tal Note An external resistor is not required between OSC32_IN and OSC32_OUT and it is forbidden to add one 6 3 8 Internal clock source characteristics The parameters given in Table 38 are derived fro...

Page 65: ...Max Unit fHSI Frequency 8 MHz TRIM HSI user trimming step 1 2 2 Guaranteed by design not tested in production DuCy HSI Duty cycle 45 2 55 2 ACCHSI Accuracy of the HSI oscillator TA 40 to 105 C 2 8 3...

Page 66: ...ameter Conditions Min Typ Max Unit fHSI14 Frequency 14 MHz TRIM HSI14 user trimming step 1 2 2 Guaranteed by design not tested in production DuCy HSI14 Duty cycle 45 2 55 2 ACCHSI14 Accuracy of the HS...

Page 67: ...ons Min Typ Max Unit fHSI48 Frequency 48 MHz TRIM HSI48 user trimming step 0 09 2 0 14 0 2 2 DuCy HSI48 Duty cycle 45 2 2 Guaranteed by design not tested in production 55 2 ACCHSI48 Accuracy of the HS...

Page 68: ...startup time 85 s IDDA LSI 2 LSI oscillator power consumption 0 75 1 2 A Table 42 PLL characteristics Symbol Parameter Value Unit Min Typ Max fPLL_IN PLL input clock 1 1 Take care to use the appropri...

Page 69: ...to avoid noise problems EMC characterization and optimization are performed at component level with a typical application environment and simplified MCU software It should be noted that good EMC perf...

Page 70: ...device are monitored while a simple application is executed toggling 2 LEDs through the I O ports This emission test is compliant with IEC 61967 2 standard which specifies the test board and the pin l...

Page 71: ...ecting current into the I O pins programmed in floating input mode While current is injected into the I O pin one at a time the device is checked for functional failures The failure is indicated by an...

Page 72: ...nt on adjacent pins less than 50 A 5 NA Injected current on PB0 PB1 and all other FT and FTf pins 5 NA Injected current on all other TC TTa and RST pins 5 5 Table 50 I O static characteristics Symbol...

Page 73: ...sted in production RPD Weak pull down equivalent resistor 3 VIN VDDIOx 25 40 55 k CIO I O pin capacitance 5 pF 1 Data based on design simulation only Not tested in production 2 The leakage could be hi...

Page 74: ...eristics 06Y 9 7 67 5 1 7 67 5 1 9 PLQ 9 2 026 VWDQGDUG UHTXLUHPHQW 9 PD 9 2 026 VWDQGDUG UHTXLUHPHQW 81 1 1387 5 1 9 PLQ 9 2 9 PD 9 2 9 1 9 9 2 9 77 VWDQGDUG UHTXLUHPHQW 77 VWDQGDUG UHTXLUHPHQW 06Y 9...

Page 75: ...istics 1 Symbol Parameter Conditions Min Max Unit VOL Output low level voltage for an I O pin CMOS port 2 IIO 8 mA VDDIOx 2 7 V 0 4 V VOH Output high level voltage for an I O pin VDDIOx 0 4 VOL Output...

Page 76: ...tr IO out Output rise time 125 fmax IO out Maximum frequency 3 CL 50 pF VDDIOx 2 V 1 MHz tf IO out Output fall time 125 ns tr IO out Output rise time 125 01 fmax IO out Maximum frequency 3 CL 50 pF V...

Page 77: ...Pulse width of external signals detected by the EXTI controller 10 ns 1 The I O speed is configured using the OSPEEDRx 1 0 bits Refer to the STM32F0xxxx RM0091 reference manual for a description of GP...

Page 78: ...tage hysteresis 200 mV RPU Weak pull up equivalent resistor 2 VIN VSS 25 40 55 k VF NRST NRST input filtered pulse 100 1 ns VNF NRST NRST input not filtered pulse 2 7 VDD 3 6 300 3 ns 2 0 VDD 3 6 500...

Page 79: ...12 MHz 0 219 s fADC fPCLK 4 10 5 1 fPCLK fADC fHSI14 14 MHz 0 179 0 250 s JitterADC ADC jitter on trigger conversion fADC fHSI14 1 1 fHSI14 tS 2 Sampling time fADC 14 MHz 0 107 17 1 s 1 5 239 5 1 fAD...

Page 80: ...est conditions Typ Max 4 Unit ET Total unadjusted error fPCLK 48 MHz fADC 14 MHz RAIN 10 k VDDA 3 V to 3 6 V TA 25 C 1 3 2 LSB EO Offset error 1 1 5 EG Gain error 0 5 1 5 ED Differential linearity err...

Page 81: ...the conversion being performed on another analog input It is recommended to add a Schottky diode pin to ground to standard analog pins which may potentially inject negative current Any positive inject...

Page 82: ...sampling time when reading the temperature 4 s 1 Guaranteed by design not tested in production 2 Measured at VDDA 3 3 V 10 mV The V30 ADC conversion result is stored in the TS_CAL1 byte Refer to Tabl...

Page 83: ...el output current maximum requirement Refer to Section 6 3 14 I O port characteristics for the I2 C I Os characteristics All I2 C SDA and SCL I Os embed an analog filter Refer to the table below for t...

Page 84: ...ck frequency Master mode 18 MHz Slave mode 18 tr SCK tf SCK SPI clock rise and fall time Capacitive load C 15 pF 6 ns tsu NSS NSS setup time Slave mode 4Tpclk ns th NSS NSS hold time Slave mode 2Tpclk...

Page 85: ...3 VDD and 0 7 VDD 06Y 9 166 LQSXW 3 32 6 LQSXW 3 32 0 62 RXWSXW 026 LQSXW WVX 6 WK 6 WZ 6 WZ 6 WF 6 WU 6 WK 166 WGLV 62 WVX 166 WD 62 WY 62 1H W ELWV 1 DVW ELW 287 LUVW ELW 1 LUVW ELW 287 1H W ELWV 28...

Page 86: ...racteristics 1 Symbol Parameter Conditions Min Max Unit fCK 1 tc CK I2 S clock frequency Master mode data 16 bits Audio frequency 48 kHz 1 597 1 601 MHz Slave mode 0 6 5 tr CK I2 S clock rise time Cap...

Page 87: ...ceiver 4 th SD_SR 2 Slave receiver 0 5 tv SD_MT 2 Data output valid time Master transmitter 4 tv SD_ST 2 Slave transmitter 20 th SD_MT Data output hold time Master transmitter 0 th SD_ST Slave transmi...

Page 88: ...rization results not tested in production 2 LSB transmit receive of the previously transmitted byte No LSB transmit receive is sent before the first byte 06Y 9 RXWSXW 32 32 WF 6 RXWSXW 6 UHFHLYH 6 WUD...

Page 89: ...r Conditions Min Typ Max Unit VDDIO2 USB transceiver operating voltage 3 0 1 1 The STM32F042x4 x6 USB functionality is ensured down to 2 7 V but not the full USB electrical characteristics which are d...

Page 90: ...ECOPACK packages depending on their level of environmental compliance ECOPACK specifications grade definitions and product status are available at www st com ECOPACK is an ST trademark 7 1 LQFP48 pac...

Page 91: ...l digits Min Typ Max Min Typ Max A 1 600 0 0630 A1 0 050 0 150 0 0020 0 0059 A2 1 350 1 400 1 450 0 0531 0 0551 0 0571 b 0 170 0 220 0 270 0 0067 0 0087 0 0106 c 0 090 0 200 0 0035 0 0079 D 8 800 9 00...

Page 92: ...48 package marking example 1 Parts marked as ES E or accompanied by an Engineering Sample notification letter are not yet qualified and therefore not yet ready to be used in production and any consequ...

Page 93: ...6 UFQFPN48 package outline 1 Drawing is not to scale 2 All leads pads should also be soldered to the PCB to improve the lead pad solder joint life 3 There is an exposed die pad on the underside of the...

Page 94: ...converted from mm and rounded to 4 decimal digits Min Typ Max Min Typ Max A 0 500 0 550 0 600 0 0197 0 0217 0 0236 A1 0 000 0 020 0 050 0 0000 0 0008 0 0020 D 6 900 7 000 7 100 0 2717 0 2756 0 2795 E...

Page 95: ...FPN48 package marking example 1 Parts marked as ES E or accompanied by an Engineering Sample notification letter are not yet qualified and therefore not yet ready to be used in production and any cons...

Page 96: ...ical data Symbol millimeters inches 1 Min Typ Max Min Typ Max A 0 525 0 555 0 585 0 0207 0 0219 0 0230 A1 0 175 0 0069 A2 0 380 0 0150 A3 2 0 025 0 0010 b 3 0 220 0 250 0 280 0 0087 0 0098 0 0110 D 2...

Page 97: ...om mm and rounded to 4 decimal digits 2 Back side coating 3 Dimension is measured at the maximum bump diameter parallel to primary datum Z Table 69 WLCSP36 recommended PCB design rules Dimension Recom...

Page 98: ...SP36 package marking example 1 Parts marked as ES E or accompanied by an Engineering Sample notification letter are not yet qualified and therefore not yet ready to be used in production and any conse...

Page 99: ...2x4 STM32F042x6 Package information 113 7 4 LQFP32 package information LQFP32 is a 32 pin 7 x 7 mm low profile quad flat package Figure 42 LQFP32 package outline 1 Drawing is not to scale F E 8 3 1 PP...

Page 100: ...digits Min Typ Max Min Typ Max A 1 600 0 0630 A1 0 050 0 150 0 0020 0 0059 A2 1 350 1 400 1 450 0 0531 0 0551 0 0571 b 0 300 0 370 0 450 0 0118 0 0146 0 0177 c 0 090 0 200 0 0035 0 0079 D 8 800 9 000...

Page 101: ...by an Engineering Sample notification letter are not yet qualified and therefore not yet ready to be used in production and any consequences deriving from such usage will not be at ST charge In no ev...

Page 102: ...scale 2 All leads pads should also be soldered to the PCB to improve the lead pad solder joint life 3 There is an exposed die pad on the underside of the UFQFPN package This pad is used for the devic...

Page 103: ...al digits Min Typ Max Min Typ Max A 0 500 0 550 0 600 0 0197 0 0217 0 0236 A1 0 000 0 020 0 050 0 0000 0 0008 0 0020 A3 0 152 0 0060 b 0 180 0 230 0 280 0 0071 0 0091 0 0110 D 4 900 5 000 5 100 0 1929...

Page 104: ...N32 package marking example 1 Parts marked as ES E or accompanied by an Engineering Sample notification letter are not yet qualified and therefore not yet ready to be used in production and any conseq...

Page 105: ...mechanical data 1 Symbol millimeters inches Min Typ Max Min Typ Max A 0 500 0 550 0 600 0 0197 0 0217 0 0236 A1 0 000 0 050 0 0000 0 0020 D 3 900 4 000 4 100 0 1535 0 1575 0 1614 D1 2 900 3 000 3 100...

Page 106: ...M32F042x4 STM32F042x6 106 117 DocID025832 Rev 5 Figure 49 Recommended footprint for UFQFPN28 package 1 Dimensions are expressed in millimeters 1 Values in inches are converted from mm and rounded to 4...

Page 107: ...FQFPN28 package marking example 1 Parts marked as ES E or accompanied by an Engineering Sample notification letter are not yet qualified and therefore not yet ready to be used in production and any co...

Page 108: ...le 73 TSSOP20 package mechanical data Symbol millimeters inches 1 Min Typ Max Min Typ Max A 1 200 0 0472 A1 0 050 0 150 0 0020 0 0059 A2 0 800 1 000 1 050 0 0315 0 0394 0 0413 b 0 190 0 300 0 0075 0 0...

Page 109: ...are converted from mm and rounded to four decimal digits 2 Dimension D does not include mold flash protrusions or gate burrs Mold flash protrusions or gate burrs shall not exceed 0 15mm per side 3 Dim...

Page 110: ...ackage marking example 1 Parts marked as ES E or accompanied by an Engineering Sample notification letter are not yet qualified and therefore not yet ready to be used in production and any consequence...

Page 111: ...king into account the actual VOL IOL and VOH IOH of the I Os at low and high level in the application 7 8 1 Reference document JESD51 2 Integrated Circuits Thermal Test Method Environment Conditions N...

Page 112: ...and to a specific maximum junction temperature As applications do not commonly use the STM32F042x4 x6 at maximum dissipation it is useful to calculate the exact power consumption and junction tempera...

Page 113: ...rdering information scheme Example STM32 F 042 C 6 T 6 xxx Device family STM32 ARM based 32 bit microcontroller Product type F General purpose Sub family 042 STM32F042xx Pin count F 20 pins G 28 pins...

Page 114: ...static characteristics I O current injection susceptibility EMS characteristics EMI characteristics Updated figures UFQFPN32 32 pin package pinout UQFPN28 28 pin package Power supply scheme TC and TT...

Page 115: ...DD 3 6 V removing code executing from Flash or RAM removal of the min value for tSTART parameter in Table 57 TS characteristics the typical value for R parameter in Table 58 VBAT monitoring characteri...

Page 116: ...Electrical characteristics Table 50 I O static characteristics removed note Section 6 3 16 12 bit ADC characteristics changed introductory sentence Section 7 Package information Figure 49 Recommended...

Page 117: ...ement Purchasers are solely responsible for the choice selection and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products No license express o...

Page 118: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information STMicroelectronics STM32F042K4T6 STM32F042G6U7 STM32F042C4U6...

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