Pinouts and pin description
STM32F038x6
30/102
DocID026079 Rev 3
41
28
26
C2
-
PB5
I/O
FT
-
SPI1_MOSI,
I2S1_SD,
I2C1_SMBA,
TIM16_BKIN,
TIM3_CH2
-
42
29
27
B2
-
PB6
I/O
FTf
-
I2C1_SCL,
USART1_TX,
TIM16_CH1N
-
43
30
28
A3
-
PB7
I/O
FTf
-
I2C1_SDA,
USART1_RX,
TIM17_CH1N
-
44
31
1
A4
1
BOOT0
I
B
-
Boot memory selection
45
32
-
-
-
PB8
I/O
FTf
-
I2C1_SCL,
TIM16_CH1
-
46
-
-
-
-
PB9
I/O
FTf
-
I2C1_SDA,
IR_OUT,
TIM17_CH1,
EVENTOUT
-
47
0
-
E1
-
VSS
S
-
-
Ground
48
1
-
-
-
VDD
S
-
-
Digital power supply
1. PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current
(3 mA), the use of GPIOs PC13 to PC15 in output mode is limited:
- The speed should not exceed 2 MHz with a maximum load of 30 pF
- These GPIOs must not be used as current sources (e.g. to drive an LED).
2. After the first RTC domain power-up, PC13, PC14 and PC15 operate as GPIOs. Their function then depends on the
content of the RTC registers which are not reset by the system reset. For details on how to manage these GPIOs, refer to
the RTC domain and RTC register descriptions in the reference manual.
3. VSSA pin is not in package pinout. VSSA pad of the die is connected to VSS pin.
4. These pins are powered by V
DDA
.
5. After reset, these pins are configured as SWDIO and SWCLK alternate functions, and the internal pull-up on the SWDIO
pin and the internal pull-down on the SWCLK pin are activated.
6. On the WLCSP25 package, PB3, PB4 and PA15 must be set to defined levels by software, as their corresponding pads on
the silicon die are left unconnected. Apply same recommendations as for unconnected pins.
Table 11. Pin definitions (continued)
Pin number
Pin name
(function upon reset)
Pin type
I/O
structure
Notes
Pin functions
LQ
FP4
8
UFQFPN3
2
UFQFPN2
8
WLCSP25
TSSOP20
Alternate functions
Additional
functions
