Sony WX-7700MDX, Service Manual

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70
WX-7700MDX
Pin No. Pin Name I/O Description
59 SCK I Serial data transfer clock signal input from the master controller for the micro controller interface
60 REDY O
Transfer enable signal output for micro controller interface to the master controller
“L”: transfer prohibition
61 TRDT O
Serial data output to the master controller and liquid crystal display controller
62 XLAT I
Serial data latch pulse input from the master controller
63 RVDT I
Serial data input from the master controller
64 XS24 I
Serial data 24/32 bit slot selection signal input from the master controller
“L”: 24 bit slot, “H”: 32 bit slot
65 VDD2 —
Power supply terminal (+3.3V) (digital system)
66 VSS3 —
Ground terminal (digital system)
67 to 69 SO1 to SO3 O
Serial data output terminal Not used
70 SOUT O Serial data output terminal Not used
71 SI1 I
CD or MD digital audio signal input terminal
72, 73 SI2, SI3 I
Serial data input terminal Not used
74 SIN I Serial data input terminal Not used
75 BCK I
Serial bit transfer clock signal input terminal for CD or MD digital audio signal
76 LRCK I
Sampling frequency clock signal input terminal for CD or MD digital audio signal
77 XMST I
Bit clock (BCK) and L/R sampling clock (LRCK) signal master/slave mode selection signal input
from the master controller “L”: master mode, “H”: slave mode
78 VDD3 —
Power supply terminal (+3.3V) (digital system)
79 AVSP —
Ground terminal (PLL system)
80 XPLLEN I PLL enable signal input terminal Normally: fixed at “L”
81 PLCLK O
PLL clock signal output terminal (22.5792 MHz) for MD master clock
82 XECKSTP I
MD PLL clock output control signal input from the master controller
At “L” is input: PLCKL (pin
ia
) is fixed at “L”
At “H” is input: PLCKL (pin ia ) output the PLL clock signal
83 AVDP — Power supply terminal (+3.3V) (PLL system)
84 VSS4 —
Ground terminal (digital system)
85 to 94 T.P
I Input terminal for the test Normally: fixed at “L”
95 VDD4 —
Power supply terminal (+3.3V) (digital system)
96 AVSD — Ground terminal (for D-RAM)
97 to 99 T.P
I Input terminal for the test Normally: fixed at “L”
100 AVDD —
Power supply terminal (+3.3V) (for D-RAM)