77
WX-7700MDX
Pin No.
Pin Name
I/O
Description
71 to 78
NCO
O
Not used
79
FL W
O
Control signal output terminal when writing into internal flash memory data Not used
80
FWE
I
Enable signal input terminal when writing into internal flash memory data Not used
81
RES
I
System reset signal input from the master controller, reset signal generator and reset switch
“L”: reset “L” is input for several 100 msec after power on, then it changes to “H”
82
NMI
I
Non maskable interrupt input terminal
Connect to the back-up power supply detection circuit (BU IN (pin
ef
) ) in this set
83
STBY
I
Hard ware standby signal input terminal
“L”: hard ware standby mode (fixed at “H” in this set)
84
VCC
—
Power supply terminal (+5V)
85
XTAL
O
System clock output terminal (18.432 MHz)
86
EXTAL
I
System clock input terminal (18.432 MHz)
87
VSS
—
Ground terminal
88
NCO
O
Not used
89
VCC
—
Power supply terminal (+5V)
90 to 96
NCO
O
Not used
97
UNISO
O
Serial data output to the SONY bus interface IC
98
UNISI
I
Serial data input from the SONY bus interface IC
99, 100
VSS
—
Ground terminal
101
UNICKI
I
Serial clock signal input for the bus interface from the master controller
102
NCO
O
Not used
103
AVCC
—
Power supply terminal (+5V) (for the A/D converter and D/A converter)
104
VREF
I
Reference voltage (+5V) input terminal (for the A/D converter and D/A converter)
105
LVL L
I
Analog signal input for front side (L-ch side) from the CXD2727Q
106
LVL R
I
Analog signal input for front side (R-ch side) from the CXD2727Q
107 to 112
NIL
I
Not used
113
AVSS
—
Ground terminal (for the A/D converter and D/A converter)
114
VSS
—
Ground terminal
115 to 118
NCO
O
Not used
119
PWM CYCLE
O
PWM synchronizing generation output terminal Not used
120 to 122
PWM B,
PWM G,
PWM R
O
LCD back light LED drive signal output terminal
Color switching by RGB composition
123 to 125
MD0 to MD2
I
Setting terminal for the CPU operational mode
126 to 128
NCO
O
Not used
