STR-DG820
63
DSP BOARD IC5021 D790E002BZDH300 (DSP)
Pin No.
Pin Name
I/O
Description
A1
VSS
-
Ground terminal
A2
DVDD
-
Power supply terminal (+3.3V) (for IO)
A3
AFSX0
O
L/R sampling clock signal output to the D/A converter
A4
ACLKX0
O
Bit clock signal output to the D/A converter
A5
ACLKR0
I
Bit clock signal input from the digital audio interface receiver and HDMI receiver
A6
AXR0[14]/AXR2[1]
I
PCM audio signal input from the HDMI receiver
A7
VSS
-
Ground terminal
A8
AXR0[11]/AXR1[2]
I
PCM audio signal input from the A/D converter
A9
AXR0[9]/AXR1[4]/
SPI1_SIMO
I/O
Not used
A10
VSS
-
Ground terminal
A11
AXR0[6]/SPI1_ENA#
I/O
Not used
A12
AXR0[4]
I/O
Not used
A13, A14
AXR0[2], AXR0[0]
O
PCM audio signal output to the D/A converter
A15
DVDD
-
Power supply terminal (+3.3V) (for IO)
A16
VSS
-
Ground terminal
B1
DVDD
-
Power supply terminal (+3.3V) (for IO)
B2
UHPI_HBE[3]#
I
Not used
B3
AHCLKR0/AHCLKR1
I/O
Not used
B4
AFSR0
I
L/R sampling clock signal input from the digital audio interface receiver and HDMI receiver
B5 to B7
AXR0[15]/AXR2[0],
AXR0[13]/AXR1[0],
AXR0[12]/AXR1[1]
I
PCM audio signal input from the HDMI receiver
B8
AXR0[10]/AXR1[3]
I
PCM audio signal input from the digital audio interface receiver
B9
AXR0[8]/AXR1[5]/
SPI1_SOMI
I/O
Not used
B10
AXR0[7]/SPI1/_CLK
I/O
Not used
B11
AXR0[5]/SPI1_SCS#
I/O
Not used
B12, B13
AXR0[3], AXR0[1]
O
PCM audio signal output to the D/A converter
B14
SPI0_SOMI
O
Serial data output to the system controller
B15
SPI0_SIMO
I
Serial data input from the system controller
B16
DVDD
-
Power supply terminal (+3.3V) (for IO)
C1
AMUTE0
O
Not used
C2
AHCLKX0/AHCLKX2
I
Master clock signal input from the digital audio interface receiver and HDMI receiver
C3
UHPI_HD[23]
I/O
Not used
C4 to C6
UHPI_HBE[2]# to
HPI_HBE[0]
I
Not used
C7
UHPI_HDS[2]#
I/O
Not used
C8
UHPI_HCS#
I/O
Not used
C9
UHPI_HAS#
I/O
Not used
C10
UHPI_HCNTL[1]
I/O
Not used
C11
AFSX2
I
Error signal input from the digital audio interface receiver, HDMI receiver and HDMI controller
C12
AFSR2
I
PCM audio data input from the digital audio interface receiver
C13
ACLKR2
I/O
Not used
C14
AHCLKR2
I/O
Not used
C15
SPI0_SCS#
I
Chip select signal input from the system controller
C16
SPI0_CLK
I
Serial data transfer clock signal input from the system controller
D1
AHCLKX1
I/O
Not used
D2
AMUTE1
O
Not used
D3
UHPI_HD[22]
I/O
Not used
D4, D5
DVDD
-
Power supply terminal (+3.3V) (for IO)
D6
UHPI_HRDY#
I
Not used
D7
UHPI_HDS[1]#
I/O
Not used
D8
UHPI_HRW
I
Not used
D9
UHPI_HCNTL[0]
I
Not used
D10
AMUTE2/HINT#
O
Not used
Summary of Contents for STRDG820 - STR AV Receiver
Page 95: ...MEMO STR DG820 95 ...
