Sony STRDG820 - STR AV Receiver, Service Manual

Page: 15 / 96

STR-DG820
STR-DG820
15 15
CN3500
SAT IN
ADT0P YDT0P 52 31
YDT0N 32
YDT1P 28
YDT1N 29
YDT2P 25
YDT2N 26
YCLKP 34
YCLKN 35 ADT0N 51
7 DATA0+
HDMI INPUT
SELECTOR
IC3501
HDMI
RECEIVER
IC3506
9 DATA0–
ADT1P 55
ADT1N 54
4 DATA1+
6 DATA1–
ADT2P 58
ADT2N 57
1 DATA2+
3 DATA2–
ACLKP 49
ACLKN 48
10 CLOCK+
12 CLOCK–
SDA_A 45
SCL_A 46
16 SDA (5V)
15 SCL (5V)
HPD_A 44 19 HOT PLUG DET
13 CEC
18 +5V POWER
CN3503
VIDEO 1 IN
7 DATA0+
9 DATA0–
4 DATA1+
6 DATA1–
1 DATA2+
3 DATA2–
10 CLOCK+
12 CLOCK–
16 SDA (5V)
15 SCL (5V)
19 HOT PLUG DET
13 CEC
18 +5V POWER
7 DATA0+
9 DATA0–
4 DATA1+
6 DATA1–
1 DATA2+
3 DATA2–
10 CLOCK+
12 CLOCK–
16 SDA (5V)
15 SCL (5V)
19 HOT PLUG DET
13 CEC
CN3505
HDMI
OUT
CN3501
DVD IN
BDT0P 71
BDT0N 70
7 DATA0+
9 DATA0–
BDT1P 74
BDT1N 73
4 DATA1+
6 DATA1–
BDT2P 77
BDT2N 76
1 DATA2+
3 DATA2–
R0X0+ 44
HSYNC 20 HSYNC 2
VSYNC 21 VSYNC 3
ODCK 5 IDCK 88
DE 19 DE 1
SPDIF 78
SPDIF
SD0 – SD3
BCK
LRCK
MCK
A
MUTE
(HDMI_ERROR)
L
SDA, SCL,
HDMI_RESET
J
SD0 – SD3, BCK,
LRCK, MCK
K
SPDIF 4
SCK 86 SCK 11
WS CSDA 85 WS 10 49
CSCL 48 MCLK 89 MCLK 5
R0X0– 43
R0X1+ 48
R0X1– 47
R0X2+ 52
R0X2– 51
R0XC+ 40
R0XC– 39
DSDA0 33
DSCL0 34
R1X0+ 62
R1X0– 61
R1X1+ 66
R1X1– 65
R1X2+ 70
R1X2– 69
R1XC+ 58
R1XC– 57
DSDA1 28
DSCL1
R1PWR5V
Q0
– Q35
SD0
– SD3
SD0
– SD3
D0
– D35
27
30
SDA_SINK 39
SCL_SINK 38
CSDA 26
CSCL 27
D3000
D3001
OUTDIS 42
HPD_SINK 40
SELA
1444_SELA
1444_SELB
1444_SELC
23
SELB 22
SELC 21
TX0+ 34
TX0– 33
TX1+ 37
TX1– 36
TX2+ 40
TX2– 39
TXC+ 31
TXC– 30
DSDA 47
DSCL 46
HPD 51
BCLKP 68
BCLKN 67
10 CLOCK+
12 CLOCK–
SDA_B 63
SCL_B 64
16 SDA (5V)
15 SCL (5V)
HPD_B 62 19 HOT PLUG DET
13 CEC
18 +5V POWER
HDMI
CN3502
BD IN
CDT0P 9
CDT0N 8
7 DATA0+
9 DATA0–
CDT1P 12
CDT1N 11
4 DATA1+
6 DATA1–
CDT2P 15
CDT2N 14
1 DATA2+
3 DATA2–
CCLKP 6
CCLKN 5
10 CLOCK+
12 CLOCK–
SDA_C 2
SCL_C 3
16 SDA (5V)
15 SCL (5V)
HPD_C 80 19 HOT PLUG DET
CEC
H
13 CEC
18 +5V POWER
LEVEL SHIFT
IC3502
SWITCH
Q3501
R0PWR5V 35
SWITCH
Q3500
2Y1 5
2Y2 2-COM
P5V_SELA
XOUT
XIN
P5V_SELB
2 3
2Y3 4
10
SIGNAL SELECTOR
IC3503
A
9
55
HPD_IN1
Q3505
22 56
1444_SELA
51
1444_SELB
52
1444_SELC
1444_OEB 1444_HPD
53
B
EDID_SELA EDID_SELB
A
35 36
CSDA CSCL
28 27
B
INVERTER
IC3513
1444_OEB
1444_HPD
54 21
INT 102
MUTEOUT 75
RESET# 100
RX_INT
RX_RST
RX_INT
RX_RST
20 19
MUTE
65
INT 24
RESET# 25
TX_INT
TX_RST
TX_INT
TX_RST
43 42
2Y0 1
1Y0 12
2Y3 4
1Y3 11
SDA 5
SCL 6
2Y1 5
1Y1 14
2-COM 3
1-COM 13
VUCOM_SDA
SDA
SCL
HDMI_RESET
33
NON_LPCM
M
NON_LPCM 64
TX_5VPWR
N
TX_5VPWR 41
VUCOM_SCL 34
RESET 10
DATA SELECTOR
IC3504
EEPROM
IC3505
10 9
A B WP
7
XT
ALOUT
94
XT
ALIN
95
X3500
28.322MHz
16 – 13, 10 –7, 3 – 1, 144,
141 – 138, 135 –132, 129 – 126, 123 – 120, 1
17 –1
14, 1
11 – 108,
98 – 90, 86 – 77, 75 – 67, 63 – 56
36
4
81 – 84
9 – 6
BUFFER
IC3507
13 11
X3000
10MHz
HDMI
TRANSCEIVER
IC3508
HDMI CONTROLLER
IC3000
: VIDEO
: AUDIO (DIGITAL)
SIGNAL PATH
6-2. BLOCK DIAGRAM - HDMI Section -
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