SA-WCT100/SS-MCT100
SA-WCT100/SS-MCT100
33
33
5-19. SCHEMATIC DIAGRAM - HDMI Board (2/2) (SA-WCT100) -
• See Page 40 for waveforms. • See Page 40 for IC Block Diagrams. • See page 50 for IC Pin Function Description.
Note:
When IC3513 cannot exchange with single. When IC3513
is damaged, exchange the entire mounted board.
22
A
M A I N
B O A R D
( 1 / 7 )
C N 1 0 0 4
21
H D M I
B O A R D
( 1 / 2 )
E
M A I N
B O A R D
( 7 / 7 )
C N 1 0 0 5
IC B/D
IC B/D
IC B/D
GND
VOUT
ADJ
0
0
0
0
0
0
0
0
0
0
3 . 3
3 . 3
0
0
0
0
3 . 3
3 . 3
0
0
0
3 . 3
0
0
0
0
0
3 . 3
3 . 3
0
1 . 8
3 . 3
7 . 3
5
3 . 3
1 . 3
3 . 2
4 . 2
3 . 3
3 . 3
3 . 2
4 . 2
3 . 3
3 . 3
5
3 . 3
3 . 3
3 . 3
3 . 3
5
3 . 3
0
1.8
0
3.3
1.3
1.8
0.5
0
3 . 3
1 . 8
0
0
1.8
3.3
1.8
0
0
0
3.3
3.3
3.3
3.3
3.3
3.3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3.3
1.8
0
0
0
0
0
0
0
0
0
3 . 3
3 . 3
3 . 3
3 . 3
0
0
0
0
0
0
0
0
0
2 . 9
1 . 8
0 . 9
3 . 3
3 . 3
3 . 3
3 . 3
0
0
0
3.3
3.3
0
0
3.3
3 . 3
3 . 3
3 . 3
0
0
3 . 3
0
0
3.3
0.3
0
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
0
0
54
3
2
1
T K 111 5 0 C S C L - G
I C 3 5 1 6
0 . 0 1
C 3 5 7 9
0 . 2 2
C 3 5 8 4
1
C 3 5 8 5
0 . 1
C 3 5 5 8
0 . 1
C 3 5 6 2
0 . 1
C 3 5 6 4
1 0 k
R 3 5 8 1
0 . 5 %
4 7 0
R 3 5 8 0
4 V
2 2 0
C 3 5 7 4
4 . 7 k
R 3 5 8 3
4 . 7 k
R 3 5 8 4
47
R3576
J L 3 5 6 3
10k
R3579
D3502
0
R3597
0 . 1
C 3 5 0 1
0 . 1
C 3 5 0 9
R3521 10k
R3524 10k
J L 3 5 0 6
J L 3 5 0 7
J L 3 5 0 8
0
R3598
1 0 0
R 3 5 7 0
14
13
12
11
10
9
8
7
6
5
4
3
2
1
7 4 L C X 0 8 M T C X
I C 3 5 0 1
R 3 5 9 3
1 0 k
1.8k
R3599
1.8k
R3600
0 . 1
C 3 5 9 1
1 0 k
R 3 5 9 4
1 0 k
R 3 5 9 5
1 0 k
R 3 5 0 0
0
R 3 5 1 9
0
R 3 5 8 5
0
R 3 5 8 6
0
R 3 5 8 7
0
R 3 5 8 8
0
R 3 5 8 9
0
R 3 5 9 0
0
R 3 5 9 1
0
R 3 5 9 2
J L 3 5 6 5
J L 3 5 6 6
47
R3577
1
2
3
4
5
6
7
8
9
1 0
11
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
1 9 P
C N 3 5 0 4
1
2
3
4
5
5 P
C N 3 5 0 9
E 4 V
E 4 V
D G N D
D G N D
E 6 V
1
2
3
4
5
6
7
8
9
1 0
11
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
2 5
2 6
2 7
2 8
2 9
3 0
3 1
3 2
3 3
3 4
3 5
3 6
3 7
3 8
3 9
4 0
4 1
4 2
4 3
4 4
4 5
4 6
4 7
4 8
4 9
5 0
5 1
5 2
5 3
5 4
5 5
5 6
5 7
5 8
5 9
6 0
6 1
6 2
6 3
6 4
6 5
6 6
6 7
6 8
6 9
7 0
7 1
7 2
7 3
7 4
7 5
7 6
7 7
7 8
7 9
8 0
S I I 9 0 3 0 C T U - 7
I C 3 5 1 3
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
S N 7 4 LV 4 0 5 2 A P W R
I C 3 5 0 4
1
2
3
4
5
S I - 3 0 3 3 K M - T L
I C 3 5 2 6
1
2
3
4
5
S I - 3 0 3 3 K M - T L
I C 3 5 2 7
R3790
10k
R3792
10k
R3793
10k
0 . 0 1
C 3 6 1 9
1 0 k
R 3 7 9 6
0
R 3 7 9 8
1 0 k
R 3 7 0 0
1 0 k
R 3 6 0 1
10k
R3602
10k
R3603
10k
R3604
10k
R3605
47
R3608
47
R3609
47
R3610
47
R361
1
47
R3612
4 7
R 3 6 1 3
4 7
R 3 6 1 4
4 7
R 3 6 1 5
4 7
R 3 6 1 6
4 7
R 3 6 2 1
4 7
R 3 6 2 2
4 7
R 3 6 2 3
22
R3624
22
R3625
J L 3 5 8 8
J L 3 5 8 9
J L 3 5 9 0
J L 3 5 9 1
J L 3 5 9 2
J L 3 5 9 3
J L 3 5 9 4
J L 3 5 9 5
J L 3 5 9 6
J L 3 5 9 7
J L 3 6 0 4
JL3605
JL3606
JL3607
JL3608
J L 3 6 0 9
J L 3 6 1 0
V C C
G N D
O U T
B A 1 8 B C 0 F P - E 2
I C 3 5 2 8
6 . 3 V
4 7
C 3 6 2 5
0
R3633
1
2
3
4
5
6
7
7 P
C N 3 5 1 0
0
R 3 7 8 4
0
R 3 7 8 8
0 . 3 3
C 3 5 9 0
FB3505
FB3504
F B 3 5 0 6
F B 3 5 1 2
F B 3 5 1 3
F B 3 5 1 4
0 . 1
C 3 6 3 0
0 . 1
C 3 6 3 1
0 . 1
C 3 6 3 2
47k
R3642
JL361
1
JL3612
JL3613
JL3614
JL3615
JL3616
JL3617
JL3618
JL3619
JL3620
JL3621
JL3622
JL3623
4 7
R 3 7 9 9
0 . 1
C 3 6 2 0
0.1
C3615
0.1
C3616
0 . 1
C 3 6 1 7
0.1
C3618
100
R3578
0
R 3 6 6 0
6 . 3 V
2 2 0
C 3 5 7 5
1 0 M H z
X 3 5 0 2
E
E T 3 5 0 3
1 6 V
1 0 0
C 3 5 8 6
6 . 3 V
1 0 0
C 3 5 8 0
6 . 3 V
1 0 0
C 3 5 7 6
1 0 V
4 7
C 3 5 9 3
1 0 V
4 7
C 3 5 9 4
1 0 0
R 3 6 7 6
1 0 k
R 3 7 9 7
4.7
R3582
1 6 V
1 0 0
C 3 6 2 1
12345678
9
1
01
1
1
21
31
41
51
61
71
81
92
02
12
22
3
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
M 3 0 6 2 0 F C P G P - R C T 0 1
I C 3 5 1 9
N C
N C
N C
N C
N C
B Y T E
C N V S S
N C
N C
R E S E T
X O U T
V S S
X I N
V C C _ 3 . 3 V
N M I
N C
N C
N C
R X _ R S T
R X _ I N T
R X _ H P D 1
N C
N C
N C
N C
NC
CSCL
CSDA
232COUT
232CIN
NC
NC
TX
RX
EEPROMSEL1
NC
NC
NC
NC
VDAC_RESET
TX_5VPWR
TX_RST
TX_INT
NC
NC
NC
NC
NC
NC
NC
T M D S _ S 1
T M D S _ S 2
T M D S _ S 3
T M D S _ O E B
P 5 V _ S E L A
P 5 V _ S E L B
N C
N C
N C
V C C _ 3 . 3 V
N C
V S S
N C
N C
M U T E
A D _ S W
A D _ I N T
A D _ R S T
P R O U T _ R S T
P R O U _ O U T _ S W
N C
N C
N C
N C
N C
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
MODEL_SW3
MODEL_SW2
MODEL_SW1
AV
S
S
NC
VREF
A
VCC
NC
NC
NC
1 0 0
R 3 6 4 5
1.8k
R3652
1.8k
R3653
I S A 1 2 3 5 A C 1 T P - 1 E F
Q 3 5 0 5
I S A 1 2 3 5 A C 1 T P - 1 E F
Q 3 5 0 6
I S A 1 2 3 5 A C 1 T P - 1 E F
Q 3 5 0 7
M A 2 J 111 0 G L S 0
D 3 5 11
4.7k
R371
1
2 2 k
R 3 7 1 2
2 2 k
R 3 7 1 3
4.7k
R3714
4.7k
R3715
2 2 k
R 3 7 1 6
D 3 5 1 2
D 3 5 1 3
1
2
3
4
5
6
7
8
9
1 0
11
1 2
1 3
1 4
1 5
1 6
1 7
1 7 P
C N 3 5 11
C E C
H R E S E T
H U A RT _ R X
H U A RT _ T X
P C O N T 4
M U T E _ R E Q
H D M I _ S P D I F
S D 0
S D 1
S D 2
S D 3
H D M I _ L R C K
H D M I _ B C K
G N D
H D M I _ M C K
G N D
G N D
0.1
C3561
0.1
C3563
0.1
C3566
0.1
C3557
0 . 1
C 3 5 6 7
6 . 3 V
4 7
C 3 5 7 1
0 . 1
C 3 5 6 8
0 . 1
C 3 5 6 9
1 6 V
1 0 0
C 3 5 7 2
0 . 1
C 3 5 7 0
6 . 3 V
4 7
C 3 5 7 3
0 . 1
C 3 5 5 5
0 . 1
C 3 5 5 6
A 1 3
A 1 2
A 11
A 1 0
A 6
A 5
A 3
A 2
A 9
A 8
A 1
A 4
D1
G2
S2
D2
G1
S1
S S M 6 N 1 5 F U ( T E 8 5 R )
Q 3 5 0 4
10k
R3634
SPDIF
MCK
SD[3]
SD[2]
SD[1]
BCK
LRCK
SD[0]
R X _ R S T
R X _ H P D [ 1 ]
R X _ I N T
T M D S _ S [ 1 ]
T M D S _ S [ 2 ]
T M D S _ S [ 3 ]
T M D S _ O E B
P 5 V _ S E L A
EEPROMSEL[1]
Q[23]
Q[22]
Q[21]
Q[20]
Q[19]
Q[18]
Q[17]
Q[16]
Q[15]
Q[14]
Q [ 1 2 ]
Q [ 11 ]
Q [ 1 0 ]
Q [ 9 ]
O D C K
Q [ 8 ]
Q [ 7 ]
Q [ 6 ]
Q [ 5 ]
Q [ 4 ]
Q [ 3 ]
Q [ 2 ]
Q [ 1 ]
Q [ 0 ]
D E
HSYNC
VSYNC
P 5 V _ S E L A
CSCL
CSDA
B C K
S D [ 3 ]
S D [ 2 ]
S D [ 0 ]
M C K
L R C K
S D [ 1 ]
S P D I F
P 5 V _ S E L B
Q [ 1 3 ]
P 5 V _ S E L B
CSCL
CSDA
D ATA 2 -
D ATA 2 +
D ATA 1 S H I E L D
D ATA 1 +
R E S E RV E ( N . C )
D ATA 0 S H I E L D
D ATA 1 -
+ 5 V P O W E R
C L O C K S H I E L D
D ATA 0 -
D ATA 2 S H I E L D
C L O C K -
C E C
D D C / C E C G N D
H O T P L U G D E T
S C L ( 5 V )
S D A ( 5 V )
C L O C K +
D ATA 0 +
HSYNC
VSYNC
CGND
SPDIF
MCLK
SD3
SD2
SD1
SD0
WS
SCK
IOVCC
IOGND
CGND
CVCC18
INT
HPD
DSDA
DSCL
CVCC18
R S V D L
P G N D 1
P V C C 1
E X T _ S W I N G
A G N D
T X C -
T X C +
AV C C
T X 0 -
T X O +
A G N D
T X 1 -
T X 1 +
AV C C
T X 2 -
T X 2 +
A G N D
P V C C 2
P G N D 2
N C
D 1 3
D 1 2
D 11
D 1 0
D 9
I D C K
D 8
D 7
D 6
D 5
I O V C C
I O G N D
C G N D
C V C C 1 8
D 4
D 3
D 2
D 1
D 0
D E
CGND
CVCC18
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
IOVCC
IOGND
CGND
CVCC18
CSDA
CSCL
RESET
CI2CA
C O N T
G N D
N O I S E
V O U T
V I N
V S S
V D D
G N D
1 Y 3
1 Y 1
V C C
1 - C O M
2 - C O M
1 Y 0
2 Y 0
2 Y 3
G N D
A
2 Y 1
I N H
1 Y 2
2 Y 2
B
2 3 2 C _ O U T
2 3 2 C _ I N
G N D
3 . 3 V
G N D
R E S E T
C N V S S
( 2 / 2 )
H D M I B O A R D
H D M I T R A N S C E I V E R
I C 3 5 1 3
H D M I C O N T R O L L E R
I C 3 5 1 9
I C 3 5 2 6
+ 5 V R E G U L ATO R
I C 3 5 1 6
+ 3 . 3 V
R E G U L ATO R
I C 3 5 2 7
I C 3 5 2 8
I C 3 5 0 1
L E V E L S H I F T
I C 3 5 0 4
S I G N A L S E L E C TO R
Q 3 5 0 5 - 3 5 0 7
S W I T C H
Q 3 5 0 4
L E V E S H I F T
H D M I
T V
O U T
7
3
H
G
1 0
C
1 4
1
2
E
1 6
F
I
11
1 3
9
6
1 2
5
4
D
8
B
A
1 5
1
2
3
M A 2 J 111 0 G L S 0
M A 2 J 111 0 G L S 0
MA2J1
110GLS0
+ 3 . 3 V
R E G U L ATO R
+ 1 . 8 V
R E G U L ATO R
IC B/D
( N C )
VC
VIN
GND
VOUT
ADJ
VC
VIN
(CHASSIS)
(Page 19)
(Page 32)
(Page 25)